Re: [PATCH v4 02/16] spi: dt-bindings: add spi-phy-pattern-partition property

[Krzysztof Kozlowski]

On Thu, Jun 18, 2026 at 01:07:11PM +0530, Santhosh Kumar K wrote:
> Add spi-phy-pattern-partition, a per-device phandle property on the
> flash sub-node that allows the DT author to directly reference the
> partition holding the PHY tuning pattern. Used to locate the pattern
> data during PHY tuning when the device cannot load the pattern
> dynamically.
> 
> "Read PHY tuning" works by reading a known data pattern from the device
> repeatedly while sweeping controller delay parameters until the
> capture window is stable. For SPI NAND, the driver loads the pattern
> into the page cache once using write-to-cache opcodes, then reads it
> during the sweep. SPI NOR devices have no equivalent opcode, so the
> pattern must be pre-programmed in a dedicated flash partition. One
> partition per device is required to keep the procedure unambiguous
> when multiple devices share a bus.
> 
> Signed-off-by: Santhosh Kumar K <s-k6@xxxxxx>
> ---
>  .../bindings/spi/cdns,qspi-nor.yaml           | 19 +++++++++++++++++++
>  .../bindings/spi/spi-peripheral-props.yaml    |  7 +++++++
>  2 files changed, 26 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
> index 891f578b5ac4..c6f1b1d1251d 100644
> --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
> +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
> @@ -204,10 +204,29 @@ examples:
>          flash@0 {
>              compatible = "jedec,spi-nor";
>              reg = <0x0>;
> +            #address-cells = <1>;
> +            #size-cells = <1>;

This is neither needed, nor correct.

>              cdns,read-delay = <4>;
>              cdns,tshsl-ns = <60>;
>              cdns,tsd2d-ns = <60>;
>              cdns,tchsh-ns = <60>;
>              cdns,tslch-ns = <60>;
> +            spi-phy-pattern-partition = <&phy_pattern>;
> +
> +            partitions {
> +                compatible = "fixed-partitions";
> +                #address-cells = <1>;
> +                #size-cells = <1>;
> +
> +                partition@0 {
> +                    label = "data";
> +                    reg = <0x0 0x3fc0000>;
> +                };
> +
> +                phy_pattern: partition@3fc0000 {
> +                    label = "phy-pattern";
> +                    reg = <0x3fc0000 0x40000>;
> +                };
> +            };
>          };
>      };
> diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> index ece86f65930f..38708f8197f9 100644
> --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> @@ -123,6 +123,13 @@ properties:
>      description:
>        Delay, in microseconds, after a write transfer.
>  
> +  spi-phy-pattern-partition:

Is this specific to SPI-based MTD/NAND or rather broader - specific to
MTD/NAND memories, regardless of interface? Feels like the second, thus
maybe should be placed into the NAND bindings.

If the first, then in below description:

s/PHY/SPI PHY/ to be clear that this is about SPI, not the memory
itself.


> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to the flash partition holding the pre-programmed PHY tuning
> +      pattern. Used when the device cannot load the pattern dynamically during
> +      PHY tuning.

Best regards,
Krzysztof