Re: [PATCH v6 5/8] clk: qcom: tcsrcc-glymur: Add Mahua QREF regulator support
From: Konrad Dybcio
Date: Mon Jun 22 2026 - 09:05:39 EST
On 6/22/26 2:49 PM, Qiang Yu wrote:
> On Mon, Jun 22, 2026 at 01:35:45PM +0200, Konrad Dybcio wrote:
>> On 6/22/26 7:11 AM, Qiang Yu wrote:
>>> Mahua is based on Glymur but uses a different QREF topology, requiring
>>> distinct regulator lists and clock descriptors for its PCIe clock
>>> references.
>>>
>>> Add mahua-specific regulator arrays and clk descriptor table, and use
>>> match_data to select the correct descriptor table per compatible string at
>>> probe time.
>>>
>>> Signed-off-by: Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
>>> ---
[...]
>> You're also missing PCIe_1_CLKREF_EN (+0x48) (for PCIe5)
>> which goes through CXO1_>TX->RPT0->RPT1->RPT2->RX2
>
> I have removed PCIe_1_CLKREF_EN in dts node because PCIe5 PHY doesn't
> require QREF. So I didn't provide its structure here.
I don't quite get what you mean. I see that it is there in the graph
Konrad