Re: [PATCH v6 2/4] arm64: dts: renesas: rzg3e-smarc-som: Add Versa3 clock generator

[Geert Uytterhoeven]

On Fri, 19 Jun 2026 at 10:40, John Madieu <john.madieu.xa@xxxxxxxxxxxxxx> wrote:
> Add the Renesas 5P35023 (Versa3) programmable clock generator on the
> I2C2 bus along with its 24MHz input clock (x2 oscillator) to feed the
> audio subsystem.
>
> The Versa3 provides the following clock outputs:
> - Output 0: 24MHz (reference)
> - Output 1: 12.288MHz (audio, 48kHz family)
> - Output 2: 11.2896MHz (audio, 44.1kHz family)
> - Output 3: 12.288MHz (audio)
> - Output 4: 25MHz (DIFF1, Ethernet)
>
> These clocks are required for the audio codec and the Ethernet
> controller found on the RZ/G3E SMARC EVK.
>
> Output 5 (DIFF2) is left out, as it is not connected on this board.
>
> Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> ---
>
> Changes:
>
> v6:
>  - Actually drop Versa3 output 5 (DIFF2) from assigned-clocks and
>    assigned-clock-rates; v5 documented the removal in the commit
>    message but left the entry in the DTS.
> v5:
>  - Document output 4 (DIFF1) in the commit message; it is needed for
>    Ethernet.

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v7.3.

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds