Re: [PATCH v1] soc: qcom: geni-se: Increase MAX_GENI_CFG_RAMn_CNT to 1020

[Konrad Dybcio]

On 6/22/26 7:15 PM, Viken Dadhaniya wrote:
> 
> 
> On 6/15/2026 5:30 PM, Konrad Dybcio wrote:
>> On 6/15/26 2:00 PM, Konrad Dybcio wrote:
>>> On 6/15/26 7:28 AM, Viken Dadhaniya wrote:
>>>>
>>>>
>>>> On 6/9/2026 8:40 PM, Konrad Dybcio wrote:
>>>>> On 5/22/26 9:21 AM, Viken Dadhaniya wrote:
>>>>>> The current MAX_GENI_CFG_RAMn_CNT value of 455 is insufficient for
>>>>>> certain Qualcomm SoCs whose GENI firmware requires up to 1020 RAM
>>>>>> entries, causing incorrect bounds checking and preventing firmware
>>>>>> loading on those targets.
>>>>>>
>>>>>> Increase MAX_GENI_CFG_RAMn_CNT to 1020 to match the hardware-supported
>>>>>> limit and ensure correct handling of configuration RAM regions across
>>>>>> GENI-based SE blocks.
>>>>>>
>>>>>> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@xxxxxxxxxxxxxxxx>
>>>>>> ---
>>>>>>  drivers/soc/qcom/qcom-geni-se.c | 2 +-
>>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
>>>>>> index cd1779b6a91a..d0810960f3da 100644
>>>>>> --- a/drivers/soc/qcom/qcom-geni-se.c
>>>>>> +++ b/drivers/soc/qcom/qcom-geni-se.c
>>>>>> @@ -152,7 +152,7 @@ struct se_fw_hdr {
>>>>>>  /*Magic numbers*/
>>>>>>  #define SE_MAGIC_NUM			0x57464553
>>>>>>  
>>>>>> -#define MAX_GENI_CFG_RAMn_CNT		455
>>>>>> +#define MAX_GENI_CFG_RAMn_CNT		1020
>>>>>
>>>>> Is there any SoC where this could overflow the register space
>>>>> (you say "certain Qualcomm SoCs")?
>>>>
>>>> Yes, on Talos (QCS615), the firmware image needs more than 455 CFG RAM
>>>> entries, so the previous limit could overflow.
>>>
>>> What I'm asking is whether the size of the RAM on any of the SoCs
>>> is less than 455 (the previous limit)
>>
>> *Less than 1020 (the new limit), of course..
>>
>> Konrad
> 
> Yes, some SoCs like kodiak, monaco and lemans have CFG RAM smaller than
> 455. But MAX_GENI_CFG_RAMn_CNT is only a firmware ceiling; the actual
> programmed size comes from the firmware header. Talos needs ~650 items,
> so the old 455 limit rejects valid firmware. Raising it to 1020 fixes
> that without changing programming behavior.

OK

I tried to find whether there's a "ram size" register to limit it further
(i.e. have a different upper bound for different platforms), but there
doesn't seem to be one.. unless we can deduce it from the version
register?

Konrad