RE: [PATCH v5 4/4] arm64: dts: cix: sky1: add audss cru
From: Joakim Zhang
Date: Tue Jun 23 2026 - 03:07:49 EST
Hi,
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Sent: Monday, June 22, 2026 5:03 PM
> To: Joakim Zhang <joakim.zhang@xxxxxxxxxxx>
> Cc: mturquette@xxxxxxxxxxxx; sboyd@xxxxxxxxxx; bmasney@xxxxxxxxxx;
> robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
> p.zabel@xxxxxxxxxxxxxx; Gary Yang <gary.yang@xxxxxxxxxxx>; cix-kernel-
> upstream <cix-kernel-upstream@xxxxxxxxxxx>; linux-clk@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v5 4/4] arm64: dts: cix: sky1: add audss cru
>
> EXTERNAL EMAIL
>
> On Mon, Jun 22, 2026 at 10:25:20AM +0800, joakim.zhang@xxxxxxxxxxx wrote:
> >
> > + audss_cru: clock-controller@7110000 {
> > + compatible = "cix,sky1-audss-cru";
> > + reg = <0x0 0x07110000 0x0 0x10000>;
> > + #clock-cells = <1>;
> > + #reset-cells = <1>;
> > + clocks = <&scmi_clk CLK_TREE_AUDIO_CLK0>,
> > + <&scmi_clk CLK_TREE_AUDIO_CLK2>,
> > + <&scmi_clk CLK_TREE_AUDIO_CLK4>,
> > + <&scmi_clk CLK_TREE_AUDIO_CLK5>;
> > + clock-names = "x8k", "x11k", "sys", "48m";
> > + power-domains = <&smc_devpd SKY1_PD_AUDIO>;
> > + resets = <&s5_syscon SKY1_AUDIO_HIFI5_NOC_RESET_N>;
>
> > + status = "okay";
>
> Drop.
Ok.
Thanks,
Joakim