Re: [PATCH v2] clk: versaclock7: Fix APLL clock leak on probe failure

[Brian Masney]

On Tue, Jun 23, 2026 at 06:40:18PM +0900, Myeonghun Pak wrote:
> vc7_probe() registers the APLL with clk_register_fixed_rate(), which is
> not devm-managed and must be explicitly unregistered on probe failure.
> 
> Most later errors already unwind through err_clk, but a failure from
> vc7_get_bank_clk() in the output registration loop returned directly.
> That skipped clk_unregister_fixed_rate() and leaked the APLL clock.
> 
> Route that error through the existing err_clk label so the fixed-rate
> clock is released consistently with the other probe failure paths.
> 
> This issue was identified during our ongoing static-analysis research while
> reviewing kernel code.
> 
> Fixes: 48c5e98fedd9 ("clk: Renesas versaclock7 ccf device driver")
> Co-developed-by: Ijae Kim <ae878000@xxxxxxxxx>
> Signed-off-by: Ijae Kim <ae878000@xxxxxxxxx>
> Signed-off-by: Myeonghun Pak <mhun512@xxxxxxxxx>

Reviewed-by: Brian Masney <bmasney@xxxxxxxxxx>