[PATCH v9 00/12] clk / reset: realtek: Add RTD1625 clock and reset support

From: Yu-Chun Lin

Date: Wed Jun 24 2026 - 07:31:18 EST


Hello,

This patch series adds the clock and reset controller support for Realtek's
RTD1625 SoC platform.

Because the reset controllers share the same register space with the
clock controllers on this platform, we utilize the Auxiliary Bus framework
to decouple them. The clock controllers act as the primary devices,
registering the reset controllers as auxiliary devices.

To make it easier for maintainers to review, the series has been organized
by subsystem:

1. Device Tree Bindings:
- Add bindings for the Realtek RTD1625 Clock & Reset Controllers.

2. Reset Subsystem:
- Introduce the basic Realtek reset infrastructure.
- Add the RTD1625-CRT and RTD1625-ISO platform reset drivers.

3. Clock Subsystem Infrastructure:
- Introduce a common probe, and add support for basic clocks including
PLLs, gate clocks, mux clocks, and MMC-tuned PLLs.

4. Clock Platform Drivers:
- Add the clock controller drivers for RTD1625-CRT and RTD1625-ISO.
- These drivers provide the clock sources and instantiate the
corresponding auxiliary reset devices.

Best regards,
Yu-Chun Lin
---
Changes in v9:
General:
- Split the combined clock and reset drivers into separate patches.
- Rename 'common.[ch]' to 'clk-rtk-common.[ch]' and 'reset-rtk-common.[ch]' to
avoid generic names.
- Adapt suggestions from AI review.
- Link: https://sashiko.dev/#/patchset/20260610080824.255063-1-eleanor.lin%40realtek.com.

Patch 6:
- Add 'ftbl_find_ceil_by_rate()' as a fallback in 'clk_pll_determine_rate()'.

Patch 8:
- Fix error handling in 'clk_regmap_mux_get_parent()'.

Patch 9:
- Fix potential integer overflow on 32-bit architectures in
'clk_pll_mmc_determine_rate()'.
- Add comments in 'clk_pll_mmc_set_rate()'.

v8: https://lore.kernel.org/lkml/20260610080824.255063-1-eleanor.lin@xxxxxxxxxxx/
v7: https://lore.kernel.org/lkml/20260508111641.3192177-1-eleanor.lin@xxxxxxxxxxx/
v6: https://lore.kernel.org/lkml/20260402073957.2742459-1-eleanor.lin@xxxxxxxxxxx/
v5: https://lore.kernel.org/lkml/20260324025332.3416977-1-eleanor.lin@xxxxxxxxxxx/
v4: https://lore.kernel.org/lkml/20260313081100.596224-1-eleanor.lin@xxxxxxxxxxx/
v3: https://lore.kernel.org/lkml/20260122110857.12995-1-eleanor.lin@xxxxxxxxxxx/
v2: https://lore.kernel.org/lkml/20260113112333.821-1-eleanor.lin@xxxxxxxxxxx/
v1: https://lore.kernel.org/lkml/20251229075313.27254-1-eleanor.lin@xxxxxxxxxxx/

Cheng-Yu Lee (10):
reset: Add Realtek basic reset support
reset: realtek: Add RTD1625-CRT reset driver
reset: realtek: Add RTD1625-ISO reset controller driver
clk: realtek: Introduce a common probe()
clk: realtek: Add support for phase locked loops (PLLs)
clk: realtek: Add support for gate clock
clk: realtek: Add support for mux clock
clk: realtek: Add support for MMC-tuned PLL clocks
clk: realtek: Add RTD1625-CRT clock controller driver
clk: realtek: Add RTD1625-ISO clock controller driver

Yu-Chun Lin (2):
dt-bindings: clock: Add Realtek RTD1625 Clock & Reset Controller
arm64: dts: realtek: Add clock support for RTD1625

.../bindings/clock/realtek,rtd1625-clk.yaml | 58 ++
MAINTAINERS | 20 +
arch/arm64/boot/dts/realtek/kent.dtsi | 33 +
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/realtek/Kconfig | 48 ++
drivers/clk/realtek/Makefile | 12 +
drivers/clk/realtek/clk-pll-mmc.c | 430 ++++++++++
drivers/clk/realtek/clk-pll.c | 217 +++++
drivers/clk/realtek/clk-pll.h | 60 ++
drivers/clk/realtek/clk-regmap-gate.c | 70 ++
drivers/clk/realtek/clk-regmap-gate.h | 65 ++
drivers/clk/realtek/clk-regmap-mux.c | 41 +
drivers/clk/realtek/clk-regmap-mux.h | 43 +
drivers/clk/realtek/clk-rtd1625-crt.c | 792 ++++++++++++++++++
drivers/clk/realtek/clk-rtd1625-iso.c | 151 ++++
drivers/clk/realtek/clk-rtk-common.c | 66 ++
drivers/clk/realtek/clk-rtk-common.h | 37 +
drivers/clk/realtek/freq_table.c | 57 ++
drivers/clk/realtek/freq_table.h | 18 +
drivers/reset/Kconfig | 1 +
drivers/reset/Makefile | 1 +
drivers/reset/realtek/Kconfig | 19 +
drivers/reset/realtek/Makefile | 3 +
drivers/reset/realtek/reset-rtd1625-crt.c | 187 +++++
drivers/reset/realtek/reset-rtd1625-iso.c | 99 +++
drivers/reset/realtek/reset-rtk-common.c | 90 ++
drivers/reset/realtek/reset-rtk-common.h | 29 +
.../dt-bindings/clock/realtek,rtd1625-clk.h | 164 ++++
include/dt-bindings/reset/realtek,rtd1625.h | 171 ++++
30 files changed, 2984 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/realtek,rtd1625-clk.yaml
create mode 100644 drivers/clk/realtek/Kconfig
create mode 100644 drivers/clk/realtek/Makefile
create mode 100644 drivers/clk/realtek/clk-pll-mmc.c
create mode 100644 drivers/clk/realtek/clk-pll.c
create mode 100644 drivers/clk/realtek/clk-pll.h
create mode 100644 drivers/clk/realtek/clk-regmap-gate.c
create mode 100644 drivers/clk/realtek/clk-regmap-gate.h
create mode 100644 drivers/clk/realtek/clk-regmap-mux.c
create mode 100644 drivers/clk/realtek/clk-regmap-mux.h
create mode 100644 drivers/clk/realtek/clk-rtd1625-crt.c
create mode 100644 drivers/clk/realtek/clk-rtd1625-iso.c
create mode 100644 drivers/clk/realtek/clk-rtk-common.c
create mode 100644 drivers/clk/realtek/clk-rtk-common.h
create mode 100644 drivers/clk/realtek/freq_table.c
create mode 100644 drivers/clk/realtek/freq_table.h
create mode 100644 drivers/reset/realtek/Kconfig
create mode 100644 drivers/reset/realtek/Makefile
create mode 100644 drivers/reset/realtek/reset-rtd1625-crt.c
create mode 100644 drivers/reset/realtek/reset-rtd1625-iso.c
create mode 100644 drivers/reset/realtek/reset-rtk-common.c
create mode 100644 drivers/reset/realtek/reset-rtk-common.h
create mode 100644 include/dt-bindings/clock/realtek,rtd1625-clk.h
create mode 100644 include/dt-bindings/reset/realtek,rtd1625.h

--
2.43.0