[PATCH] KVM: x86/pmu: Clean up vPMU comments and stray blank lines

[Like Xu]

Tidy up the x86 vPMU emulation code and its selftests by fixing comments
that no longer reflect the code along with assorted spelling and grammar
mistakes, and by dropping redundant blank lines reported by checkpatch.

No functional change intended.

Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
---
 arch/x86/kvm/pmu.c                                   | 12 +++++-------
 arch/x86/kvm/pmu.h                                   |  4 ++--
 arch/x86/kvm/vmx/pmu_intel.c                         |  1 -
 tools/testing/selftests/kvm/x86/pmu_counters_test.c  |  4 ++--
 .../selftests/kvm/x86/pmu_event_filter_test.c        |  4 ++--
 5 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index b92dd2e583356..e7f635b9c4d78 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -403,7 +403,7 @@ void pmc_write_counter(struct kvm_pmc *pmc, u64 val)
 	 * Drop any unconsumed accumulated counts, the WRMSR is a write, not a
 	 * read-modify-write.  Adjust the counter value so that its value is
 	 * relative to the current count, as reading the current count from
-	 * perf is faster than pausing and repgrogramming the event in order to
+	 * perf is faster than pausing and reprogramming the event in order to
 	 * reset it to '0'.  Note, this very sneakily offsets the accumulated
 	 * emulated count too, by using pmc_read_counter()!
 	 */
@@ -422,7 +422,6 @@ static int filter_cmp(const void *pa, const void *pb, u64 mask)
 	return (a > b) - (a < b);
 }
 
-
 static int filter_sort_cmp(const void *pa, const void *pb)
 {
 	return filter_cmp(pa, pb, (KVM_PMU_MASKED_ENTRY_EVENT_SELECT |
@@ -658,7 +657,7 @@ void kvm_pmu_handle_event(struct kvm_vcpu *vcpu)
 	/*
 	 * The reprogramming bitmap can be written asynchronously by something
 	 * other than the task that holds vcpu->mutex, take care to clear only
-	 * the bits that will actually processed.
+	 * the bits that will actually be processed.
 	 */
 	BUILD_BUG_ON(sizeof(bitmap) != sizeof(atomic64_t));
 	atomic64_andnot(*(s64 *)bitmap, &pmu->__reprogram_pmi);
@@ -666,9 +665,9 @@ void kvm_pmu_handle_event(struct kvm_vcpu *vcpu)
 	kvm_for_each_pmc(pmu, pmc, bit, bitmap) {
 		/*
 		 * If reprogramming fails, e.g. due to contention, re-set the
-		 * regprogram bit set, i.e. opportunistically try again on the
-		 * next PMU refresh.  Don't make a new request as doing so can
-		 * stall the guest if reprogramming repeatedly fails.
+		 * reprogram bit, i.e. opportunistically try again on the next
+		 * PMU refresh.  Don't make a new request as doing so can stall
+		 * the guest if reprogramming repeatedly fails.
 		 */
 		if (reprogram_counter(pmc))
 			set_bit(pmc->idx, pmu->reprogram_pmi);
@@ -956,7 +955,6 @@ static void kvm_pmu_reset(struct kvm_vcpu *vcpu)
 	kvm_pmu_call(reset)(vcpu);
 }
 
-
 /*
  * Refresh the PMU configuration for the vCPU, e.g. if userspace changes CPUID
  * and/or PERF_CAPABILITIES.
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index a5821d7c87f93..090c9bbb74f48 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -94,8 +94,8 @@ static inline bool kvm_vcpu_has_mediated_pmu(struct kvm_vcpu *vcpu)
  * is tracked internally via index 32.  On Intel, (AMD doesn't support fixed
  * counters), this mirrors how fixed counters are mapped to PERF_GLOBAL_CTRL
  * and similar MSRs, i.e. tracking fixed counters at base index 32 reduces the
- * amounter of boilerplate needed to iterate over PMCs *and* simplifies common
- * enabling/disable/reset operations.
+ * amount of boilerplate needed to iterate over PMCs *and* simplifies common
+ * enable/disable/reset operations.
  *
  * WARNING!  This helper is only for lookups that are initiated by KVM, it is
  * NOT safe for guest lookups, e.g. will do the wrong thing if passed a raw
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index a73a9515d96cd..70ef84aa1a223 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -795,7 +795,6 @@ static void intel_pmu_write_global_ctrl(u64 global_ctrl)
 	vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, global_ctrl);
 }
 
-
 static void intel_mediated_pmu_load(struct kvm_vcpu *vcpu)
 {
 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
diff --git a/tools/testing/selftests/kvm/x86/pmu_counters_test.c b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
index dc6afac3aa919..677dc23535487 100644
--- a/tools/testing/selftests/kvm/x86/pmu_counters_test.c
+++ b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
@@ -146,7 +146,7 @@ static u8 guest_get_pmu_version(void)
 
 /*
  * If an architectural event is supported and guaranteed to generate at least
- * one "hit, assert that its count is non-zero.  If an event isn't supported or
+ * one hit, assert that its count is non-zero.  If an event isn't supported or
  * the test can't guarantee the associated action will occur, then all bets are
  * off regarding the count, i.e. no checks can be done.
  *
@@ -598,7 +598,7 @@ static void test_intel_counters(void)
 	 * To keep the total runtime reasonable, test only a handful of select,
 	 * semi-arbitrary values for the mask of unavailable PMU events.  Test
 	 * 0 (all events available) and all ones (no events available) as well
-	 * as alternating bit sequencues, e.g. to detect if KVM is checking the
+	 * as alternating bit sequences, e.g. to detect if KVM is checking the
 	 * wrong bit(s).
 	 */
 	const u32 unavailable_masks[] = {
diff --git a/tools/testing/selftests/kvm/x86/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
index 84e4c6ca67a3d..2d401ff091124 100644
--- a/tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
+++ b/tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
@@ -62,7 +62,7 @@ struct {
 
 /*
  * If we encounter a #GP during the guest PMU sanity check, then the guest
- * PMU is not functional. Inform the hypervisor via GUEST_SYNC(0).
+ * PMU is not functional. Inform the hypervisor via GUEST_SYNC(-EFAULT).
  */
 static void guest_gp_handler(struct ex_regs *regs)
 {
@@ -73,7 +73,7 @@ static void guest_gp_handler(struct ex_regs *regs)
  * Check that we can write a new value to the given MSR and read it back.
  * The caller should provide a non-empty set of bits that are safe to flip.
  *
- * Return on success. GUEST_SYNC(0) on error.
+ * Return on success, GUEST_SYNC(-EIO) on error.
  */
 static void check_msr(u32 msr, u64 bits_to_flip)
 {
-- 
2.50.1 (Apple Git-155)