Re: [PATCH] arm64: dts: qcom: glymur: fix QUP serial engine IRQs
From: Dmitry Baryshkov
Date: Sun Jun 28 2026 - 08:59:07 EST
On Sat, Jun 27, 2026 at 09:44:31PM -0500, Bjorn Andersson wrote:
> On Fri, Jun 12, 2026 at 02:04:05AM +0300, Dmitry Baryshkov wrote:
> > On Thu, Jun 11, 2026 at 05:22:37PM +0000, Bjorn Andersson wrote:
> > > The Geni serial-engine interrupts from QUP wrapper 0 all fall in ESPI
> > > INTIDs space. While some of the i2c instances has gotten their
> > > interrupt specifiers corrected, even the other functions on the same
> > > serial-engines are wrong.
> > >
> > > Ensure that all the serial engine interrupts for QUP wrapper 0 matches
> > > the datasheet.
> > >
> > > Assisted-by: Codex:GPT-5.5
> > > Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
> > > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxxxx>
> > > ---
> > > arch/arm64/boot/dts/qcom/glymur.dtsi | 26 +++++++++++++-------------
> > > 1 file changed, 13 insertions(+), 13 deletions(-)
> >
> > What about the SPI / I2C controllers which are a part of qupv3_1?
> >
>
> They are well inside the SPI range.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
--
With best wishes
Dmitry