[PATCH 1/2] dt-bindings: memory: Add TI FSS_FSAS binding
From: Santhosh Kumar K
Date: Mon Jun 29 2026 - 02:44:35 EST
Add DT binding for the TI Flash Subsystem Application Subsystem
(FSS_FSAS_GENREGS) wrapper present in TI K3 SoCs. This block controls
XIP read prefetch for the OSPI controller.
Signed-off-by: Santhosh Kumar K <s-k6@xxxxxx>
---
.../memory-controllers/ti,am62a-fsas.yaml | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ti,am62a-fsas.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,am62a-fsas.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,am62a-fsas.yaml
new file mode 100644
index 000000000000..81c71ebfb7e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ti,am62a-fsas.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2025 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/ti/ti,am62a-fsas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 Flash SubSystem Application Subsystem (FSS_FSAS)
+
+maintainers:
+ - Santhosh Kumar K <s-k6@xxxxxx>
+
+description:
+ The FSS_FSAS_GENREGS block is a TI wrapper inside the Flash SubSystem (FSS).
+
+properties:
+ compatible:
+ const: ti,am62a-fsas
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ fsas@fc10000 {
+ compatible = "ti,am62a-fsas";
+ reg = <0x00 0x0fc10000 0x00 0x100>;
+ };
+ };
--
2.34.1