Re: [PATCH v4 13/13] arm64: dts: qcom: shikra: Add support for DISPCC/GPUCC nodes

[Imran Shaik]

On 25-06-2026 02:14 pm, Konrad Dybcio wrote:
> On 6/4/26 7:26 AM, Imran Shaik wrote:
> > Add support for Display clock controller and GPU clock controller nodes
> > on Qualcomm Shikra SoCs.
> >
> > Signed-off-by: Imran Shaik <imran.shaik@xxxxxxxxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/shikra.dtsi | 41 ++++++++++++++++++++++++++++++++++++
> >   1 file changed, 41 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
> > index a4334d99c1f35ee851ca8266ec37d4a200a07ee5..1ccb0f1419aaa34d32f3c3eaabdb8727a497b501 100644
> > --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
> > @@ -3,6 +3,8 @@
> >    * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> >    */
> >   
> > +#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
> > +#include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
> >   #include <dt-bindings/clock/qcom,rpmcc.h>
> >   #include <dt-bindings/clock/qcom,shikra-gcc.h>
> >   #include <dt-bindings/interconnect/qcom,icc.h>
> > @@ -640,6 +642,45 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
> >   			};
> >   		};
> >   
> > +		gpucc: clock-controller@5990000 {
> > +			compatible = "qcom,shikra-gpucc";
> > +			reg = <0x0 0x05990000 0x0 0x9000>;
> > +			clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
> > +				 <&rpmcc RPM_SMD_XO_CLK_SRC>,
> > +				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
> > +				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
> > +			power-domains = <&rpmpd RPMPD_VDDCX>;
> > +			#clock-cells = <1>;
> > +			#reset-cells = <1>;
> > +			#power-domain-cells = <1>;
> > +		};
> > +
> > +		dispcc: clock-controller@5f00000 {
> > +			compatible = "qcom,shikra-dispcc", "qcom,qcm2290-dispcc";
> > +			reg = <0x0 0x05f00000 0x0 0x20000>;
> > +			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
> > +				 <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
> > +				 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> > +				 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
> > +				 <0>,
> > +				 <0>,
> > +				 <0>,
> > +				 <0>,
> > +				 <&sleep_clk>;
> > +			clock-names = "bi_tcxo",
> > +				      "bi_tcxo_ao",
>
> Is the AO clock going to be any useful? Taniya recently dropped it
> from some other submission after assessing it wasn't

The Agatti DISPCC driver is consuming the AO clock for the MDSS AHB 
clocks. As we are re-using the Agatti driver for Shikra, kept the AO 
clock as is.

> > +				      "gcc_disp_gpll0_clk_src",
> > +				      "gcc_disp_gpll0_div_clk_src",
> > +				      "dsi0_phy_pll_out_byteclk",
> > +				      "dsi0_phy_pll_out_dsiclk",
> > +				      "dsi1_phy_pll_out_byteclk",
> > +				      "dsi1_phy_pll_out_dsiclk",
> > +				      "sleep_clk";
> > +			#clock-cells = <1>;
> > +			#reset-cells = <1>;
> > +			#power-domain-cells = <1>;
>
> DISP_CC also needs to source power from somewhere!

The Shikra bindings aligns with the existing Agatti bindings, as it is a 
re-use. And the Shikra/Agatti DISPCC is on CX rail, and it will be 
always ON when APPS is active.

Thanks,
Imran