Re: [PATCH v2] arm64: dts: qcom: sm8550: add SDHC4 controller node

[Konrad Dybcio]

On 6/12/26 11:11 AM, Vladimir Zapolskiy wrote:
> On 6/12/26 11:47, William Bright wrote:
>> On Thu, Jun 11, 2026 at 10:48:34AM +0300, Vladimir Zapolskiy wrote:
>>> Looks like the SDHC driver behaves expectedly then. For me it's hard to say
>>> what may be the rootcause, I believe the lower bus frequency should be fine,
>>> so it sounds like a hardware issue, but could it be PCB/board specific one?
>>>
>>> If you find a chance to copy the SDHC driver (and its small dependencies)
>>> from Android and test it on your board, and if it also fails, then it might
>>> be well concluded that something is wrong with hardware, still it won't be
>>> quite convincing that the SoC SDHC is to blame here.
>>>
>>> Hope it helps.
>>>
>> My colleague Tendai (<tendai.makumire@xxxxxxxxxxx>) had the same issue
>> with dll-tuning failing in SDR50 when working on the downstream 5.15 msm
>> kernel [1].

I have a "feature table" and it says SM8550->SDC4->DLL [Y/N] -> No

no wonder it fails the tuning if it's not present (or that's at least
my interpretation of this doc..)

There's some notes about the frequency being limited to 75 MHz in
SDR50 and to 37.5 in DDR50.

The supported modes are DS, HS, SDR12, SDR25, SDR50 and DDR50 (with
the caveat above).

Konrad