Re: [PATCH v3 03/13] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling
From: Andy Shevchenko
Date: Tue Jun 30 2026 - 08:16:51 EST
On Tue, Jun 30, 2026 at 03:05:53PM +0530, Varshini Rajendran wrote:
> Extend support to handle different temperature calibration layouts.
>
> Add a temperature calibration data layout structure to describe indexes
> of the factors P1, P4, P6, tag, minimum length of the packet and the
> scaling factors for P1 (mul, div) which are SoC-specific instead of the
> older non scalable id structure. This helps handle the differences in the
> same function flow and prepare the calibration data to be applied. Add
> additional condition to validate the calibration data read from the
> NVMEM cell using the TAG of the packet.
...
> /**
> * struct at91_adc_platform - at91-sama5d2 platform information struct
> * @layout: pointer to the reg layout struct
> * @oversampling_avail_no: number of available oversampling values
> * @chan_realbits: realbits for registered channels
> * @temp_chan: temperature channel index
> + * @temp_calib_layout: temperature calibration packet layout
This uses spaces instead of tab(s).
> * @temp_sensor: temperature sensor supported
> */
...
> + layout = st->soc_info.platform->temp_calib_layout;
> + if (!layout || !layout->p1_div)
Technically speaking the !layout condition rather means -ENODEV.
> + return -EINVAL;
...
> + clb->p1 *= layout->p1_mul;
> + clb->p1 /= layout->p1_div;
So, p1 can be defined in layout as struct u32_fract.
--
With Best Regards,
Andy Shevchenko