Re: [PATCH] ACPI: RISC-V: Fix false warning in cppc_read_ffh() for same-CPU reads

[Sunil V L]

On Tue, Jun 9, 2026 at 5:20 PM <wang.yechao255@xxxxxxxxxx> wrote:
>
> From: Wang Yechao <wang.yechao255@xxxxxxxxxx>
>
> Commit 997c021abc6e ("cpufreq: CPPC: Update FIE arch_freq_scale in
> ticks for non-PCC regs") changed the CPPC Frequency Invariance Engine
> to read AMU counters directly from the scheduler tick for non-PCC
> register spaces (like FFH), instead of deferring to a kthread. This
> means cppc_read_ffh() is now called with IRQs disabled from the tick
> handler, triggering the warning.
>
> This is the same fix as commit df6e4ab654dc ("arm64: topology: Fix
> false warning in counters_read_on_cpu() for same-CPU reads").
>
> Fixes: 997c021abc6e ("cpufreq: CPPC: Update FIE arch_freq_scale in ticks for non-PCC regs")
> Signed-off-by: Wang Yechao <wang.yechao255@xxxxxxxxxx>
> ---
>  drivers/acpi/riscv/cppc.c | 19 ++++++++++++++-----
>  1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/acpi/riscv/cppc.c b/drivers/acpi/riscv/cppc.c
> index 42c1a9052470..5dce0377a8df 100644
> --- a/drivers/acpi/riscv/cppc.c
> +++ b/drivers/acpi/riscv/cppc.c
> @@ -98,16 +98,19 @@ int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
>  {
>         struct sbi_cppc_data data;
>
> -       if (WARN_ON_ONCE(irqs_disabled()))
> -               return -EPERM;
> -
>         if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_SBI) {
>                 if (!cppc_ext_present)
>                         return -EINVAL;
>
>                 data.reg = FFH_CPPC_SBI_REG(reg->address);
>
> -               smp_call_function_single(cpu, sbi_cppc_read, &data, 1);
> +               if (irqs_disabled()) {
> +                       if (WARN_ON_ONCE(cpu != smp_processor_id()))
> +                               return -EPERM;
> +                       sbi_cppc_read(&data);
> +               } else {
> +                       smp_call_function_single(cpu, sbi_cppc_read, &data, 1);
> +               }
>
>                 *val = data.ret.value;
>
> @@ -115,7 +118,13 @@ int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
>         } else if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_CSR) {
>                 data.reg = FFH_CPPC_CSR_NUM(reg->address);
>
> -               smp_call_function_single(cpu, cppc_ffh_csr_read, &data, 1);
> +               if (irqs_disabled()) {
> +                       if (WARN_ON_ONCE(cpu != smp_processor_id()))
> +                               return -EPERM;
> +                       cppc_ffh_csr_read(&data);
> +               } else {
> +                       smp_call_function_single(cpu, cppc_ffh_csr_read, &data, 1);
> +               }
>
LGTM.
Reviewed-by: Sunil V L <sunilvl@xxxxxxxxxxxxxxxx>