[PATCH v2] iio: imu: fix typos in comments
From: Anas Khan
Date: Wed Jul 01 2026 - 12:50:32 EST
Fix several comment misspellings across drivers/iio/imu/, found with
codespell and manual review. The corrected words are coefficient,
temperature, sensitivity, access, chosen, and buses.
Signed-off-by: Anas Khan <anxkhn28@xxxxxxxxx>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxx>
---
v2: expand from the single adis16480 temperature fix (v1) to cover all
comment typos in drivers/iio/imu/, as requested by Andy Shevchenko.
The Reviewed-by is carried over as the changes remain trivial typo
fixes.
drivers/iio/imu/adis16480.c | 4 ++--
drivers/iio/imu/bmi160/bmi160_core.c | 2 +-
drivers/iio/imu/fxos8700_core.c | 2 +-
drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c | 2 +-
drivers/iio/imu/inv_icm45600/inv_icm45600.h | 2 +-
drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c | 4 ++--
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c
index 543d5c4bfb11..c7163540cd02 100644
--- a/drivers/iio/imu/adis16480.c
+++ b/drivers/iio/imu/adis16480.c
@@ -111,7 +111,7 @@
#define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
-/* Each filter coefficent bank spans two pages */
+/* Each filter coefficient bank spans two pages */
#define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \
ADIS16480_REG((page) + 1, (x) - 60 + 8))
#define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x))
@@ -1468,7 +1468,7 @@ static irqreturn_t adis16480_trigger_handler(int irq, void *p)
* We need to perform the padding to have the buffer
* elements naturally aligned in case there are any
* 32-bit storage size channels enabled which are added
- * in the buffer after the temprature data. In case
+ * in the buffer after the temperature data. In case
* there is no data being added after the temperature
* data, the padding is harmless.
*/
diff --git a/drivers/iio/imu/bmi160/bmi160_core.c b/drivers/iio/imu/bmi160/bmi160_core.c
index 4abb83b75e2e..2c0d21eb853a 100644
--- a/drivers/iio/imu/bmi160/bmi160_core.c
+++ b/drivers/iio/imu/bmi160/bmi160_core.c
@@ -5,7 +5,7 @@
* Copyright (c) 2016, Intel Corporation.
* Copyright (c) 2019, Martin Kelly.
*
- * IIO core driver for BMI160, with support for I2C/SPI busses
+ * IIO core driver for BMI160, with support for I2C/SPI buses
*
* TODO: magnetometer, hardware FIFO
*/
diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
index 281ebfd9c15a..9d2eb6fbab4a 100644
--- a/drivers/iio/imu/fxos8700_core.c
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -2,7 +2,7 @@
/*
* FXOS8700 - NXP IMU (accelerometer plus magnetometer)
*
- * IIO core driver for FXOS8700, with support for I2C/SPI busses
+ * IIO core driver for FXOS8700, with support for I2C/SPI buses
*
* TODO: Buffer, trigger, and IRQ support
*/
diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c
index 68a395758031..91b7f1ecba55 100644
--- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c
+++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c
@@ -186,7 +186,7 @@ static unsigned int inv_icm42600_wm_truncate(unsigned int watermark,
* smallest latency but this is not as simple as choosing the smallest watermark
* value. Latency depends on watermark and ODR. It requires several steps:
* 1) compute gyro and accel latencies and choose the smallest value.
- * 2) adapt the choosen latency so that it is a multiple of both gyro and accel
+ * 2) adapt the chosen latency so that it is a multiple of both gyro and accel
* ones. Otherwise it is possible that you don't meet a requirement. (for
* example with gyro @100Hz wm 4 and accel @100Hz with wm 6, choosing the
* value of 4 will not meet accel latency requirement because 6 is not a
diff --git a/drivers/iio/imu/inv_icm45600/inv_icm45600.h b/drivers/iio/imu/inv_icm45600/inv_icm45600.h
index 1c796d4b2a40..95fa934a42b4 100644
--- a/drivers/iio/imu/inv_icm45600/inv_icm45600.h
+++ b/drivers/iio/imu/inv_icm45600/inv_icm45600.h
@@ -190,7 +190,7 @@ struct inv_icm45600_sensor_state {
#define INV_ICM45600_REG_IREG_ADDR 0x7C
#define INV_ICM45600_REG_IREG_DATA 0x7E
-/* Direct acces registers */
+/* Direct access registers */
#define INV_ICM45600_REG_MISC2 0x007F
#define INV_ICM45600_MISC2_SOFT_RESET BIT(1)
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c
index 47394594d17a..6b858fdfd1c6 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c
@@ -106,9 +106,9 @@ static int inv_magn_init(struct inv_mpu6050_state *st)
return ret;
/*
- * Sensor sentivity
+ * Sensor sensitivity
* 1 uT = 0.01 G and value is in micron (1e6)
- * sensitvity = x uT * 0.01 * 1e6
+ * sensitivity = x uT * 0.01 * 1e6
*/
switch (st->chip_type) {
case INV_MPU9150:
--
2.54.0