Re: [PATCH v2 08/12] clk: qcom: gcc-mdm9607: Drop incorrect BIMC PLL and related clocks
From: Konrad Dybcio
Date: Mon Jul 06 2026 - 12:00:05 EST
On 7/6/26 5:02 PM, Stephan Gerhold wrote:
> The gcc-mdm9607 driver was originally based on gcc-msm8916, but a closer
> match nowadays is gcc-msm8909. Looking at the differences between
> gcc-mdm9607 and gcc-msm8909, there is quite some confusion around the
> definitions for the BIMC PLL.
>
> It turns out the BIMC PLL on MDM9607 is actually an Alpha PLL just like on
> MSM8909. We can vote for it using BIT(2), which explains why BIT(3) was
> used for GPLL2.
>
> In practice, the BIMC PLL is exclusively controlled by the RPM firmware and
> Linux should not touch it. So far, it was defined to model the full clock
> hierarchy, but even in read-only mode with CLK_GET_RATE_NOCACHE this is
> problematic since the RPM will silently change the clock parents without
> notifying Linux about it. The clock framework reads the clock parent only
> once during boot, so the resulting rates will still be often wrong.
>
> Follow the example of more recent SoCs and drop the BIMC PLL and all
> remaining related clocks to avoid reporting stale status data. This means
> we cannot determine the rate of these clocks anymore. This is not a big
> problem in practice, since these are NoC-related clocks that are
> independently managed through the interconnect subsystem.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Fixes: 48b7253264ea ("clk: qcom: Add MDM9607 GCC driver")
> Signed-off-by: Stephan Gerhold <stephan.gerhold@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Konrad