Re: [PATCH] arm64: dts: qcom: glymur: add CPU capacity-dmips-mhz

[Bjorn Andersson]

On Mon, 06 Jul 2026 12:25:59 +0530, Pradyot Kumar Nayak wrote:
> The Glymur SoC has two distinct core types within the same Oryon
> microarchitecture generation:
> 
>   - qcom,oryon-2-2 (cpu0-cpu5, cluster 0)
>   - qcom,oryon-2-1 (cpu6-cpu11, cluster 1; cpu12-cpu17, cluster 2)
> 
> Without capacity-dmips-mhz the Energy Aware Scheduler treats all 18
> cores as equal, leading to suboptimal task placement and frequency
> selection. In particular, heavy tasks may be pinned to cluster 0  driving
> them to maximum frequency/voltage while cluster 1/2 sit idle.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: glymur: add CPU capacity-dmips-mhz
      commit: e1a6af9411568dd4b135892d0f0905d676816196

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>