[PATCH v4 7/7] arm64: dts: qcom: x1e80100: Add deepest idle state
From: Maulik Shah
Date: Tue Jul 07 2026 - 05:31:00 EST
Add deepest idle state as GPIO IRQs can work as wakeup capable interrupts
in deepest idle state.
Update entry/exit-latency-us to follow DSDT for cluster_cl5 idle state.
Signed-off-by: Maulik Shah <maulik.shah@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/hamoa.dtsi | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 054f9c4ad192..933d81fe7841 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -299,10 +299,18 @@ cluster_cl4: cluster-sleep-0 {
cluster_cl5: cluster-sleep-1 {
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x01000054>;
- entry-latency-us = <2200>;
- exit-latency-us = <4000>;
+ entry-latency-us = <2000>;
+ exit-latency-us = <2000>;
min-residency-us = <7000>;
};
+
+ domain_ss3: domain-sleep-0 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x0200c354>;
+ entry-latency-us = <2500>;
+ exit-latency-us = <2500>;
+ min-residency-us = <9000>;
+ };
};
};
@@ -461,7 +469,7 @@ cluster_pd2: power-domain-cpu-cluster2 {
system_pd: power-domain-system {
#power-domain-cells = <0>;
- /* TODO: system-wide idle states */
+ domain-idle-states = <&domain_ss3>;
};
};
--
2.43.0