Re: [PATCH] staging: rtl8723bs: replace beacon timing magic numbers with named constants

[Greg KH]

On Thu, Jun 04, 2026 at 04:18:28PM +0100, Jad Keskes wrote:
> Decompose the beacon timing magic numbers in
> rtl8723b_InitBeaconParameters() into named constants with bitfield
> expressions to document the register layout.
> 
> REG_TBTT_PROHIBIT (0x0540): The value 0x6404 splits into hold time
> (0x64) in the upper byte and prohibit setup time (0x04) in the lower
> byte, in 32us units — matching the layout used in the rtw88 driver
> (WLAN_TBTT_HOLD_TIME << 8 | WLAN_TBTT_PROHIBIT).

Where did this info come from?

> 
> REG_BCNTCFG (0x0510): The value 0x660F follows the same bitfield
> layout as the adjacent EDCA AC parameter registers:
> AIFS = bits[7:0] = 0x0F (disables contention before beacon Tx);
> CWmin = bits[11:8] = 0x06; CWmax = bits[15:12] = 0x06.
> This layout is confirmed by rtl8192cu which writes 0x66FF (test chips)
> and 0x660F (normal chips) — only AIFS varies, the CW byte stays 0x66.

Same here, where did you get this information from?

Did you use a LLM for this change?

thanks,

greg k-h