[PATCH 00/15] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support

[Zide Chen]

KVM currently caps the guest Intel architectural PMU version at 2. This
series bumps it to PerfMon v5 and adds support for some features that
are introduced in PerfMon v3-v5.

- CPUID.0AH:ECX fixed-counter bitmap (v5): supersedes EDX[4:0] and
  lets KVM/guests represent non-contiguous fixed counters (e.g. some
  E-core server parts skip fixed counter 3).
- Add support for IA32_PERF_GLOBAL_STATUS_SET (v4): lets software set
  individual bits in the global status MSR.
- Add support for IA32_PERF_GLOBAL_INUSE (v4): reports which counters
  and PMI are currently claimed.
- Add support for streamlined Freeze_LBRs_On_PMI.
- Implement ANYTHREAD_DEPRECATION capability.

Intel PerfMon v5 doesn't support non-contiguous GP counters; however,
this series lays the groundwork for GP counter bitmap support anyway,
for consistency with the host perf API interface, and prepares for
perfmon_mask support.

Freeze_PerfMon_On_PMI virtualization is not implemented because as
commit 3daa96d67274 ("perf/intel: Remove Perfmon-v4 counter_freezing
support") states, the Freeze-on-PMI mechanism violates the perf counter
independence.

Patch series summary:
patch 1-3: Code cleanup: rename and remove redundant definitions.
patch 4-9: Implement PMC bitmap support.
patch 10-13: Implement PerfMon v3-v5 new features.
patch 14: Advertise Perfmon version up to v5.
patch 15: Fix pmu_counters_test selftests fixed counter test case.

This patchset is on top of the Topdown metrics patchset:
https://lore.kernel.org/kvm/20260629231938.15129-1-zide.chen@xxxxxxxxx/T/#t

Dapeng Mi (6):
  KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu
  perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap
  KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities
  perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability
  KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts
  KVM: selftests: Support fixed counters bitmap in pmu_counters_test

Zide Chen (9):
  KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions
  KVM: x86/pmu: Rename all_valid_pmc_idx to all_valid_pmc_mask
  KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu
  KVM: x86/pmu: Add PMC bitmap accessor helpers
  KVM: x86/pmu: Expose kvm_host_pmu to vendor modules
  KVM: x86/pmu: Emulate the GLOBAL_STATUS_SET and GLOBAL_INUSE MSRs
  KVM: x86/pmu: Emulate streamlined Freeze-LBR-on-PMI
  KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap
  KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is not set

 arch/x86/events/core.c                        |   8 +-
 arch/x86/include/asm/kvm_host.h               |   9 +-
 arch/x86/include/asm/msr-index.h              |  12 +-
 arch/x86/include/asm/perf_event.h             |  10 +-
 arch/x86/kvm/cpuid.c                          |  19 +-
 arch/x86/kvm/msrs.c                           |  12 +-
 arch/x86/kvm/pmu.c                            |  86 +++++----
 arch/x86/kvm/pmu.h                            |  56 +++++-
 arch/x86/kvm/svm/pmu.c                        |  31 ++--
 arch/x86/kvm/svm/svm.c                        |  14 +-
 arch/x86/kvm/vmx/nested.c                     |   6 +-
 arch/x86/kvm/vmx/pmu_intel.c                  | 167 +++++++++++++-----
 arch/x86/kvm/vmx/vmx.c                        |  19 +-
 .../selftests/kvm/x86/pmu_counters_test.c     |  25 ++-
 14 files changed, 319 insertions(+), 155 deletions(-)

-- 
2.54.0