Re: [PATCH 4/6] clk: renesas: rzg2l: Add support for RZ/G3L DSI mux

[Geert Uytterhoeven]

Hi Biju,

On Fri, 19 Jun 2026 at 18:40, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add support for RZ/G3L DSI mux that supports 2 duty cycles.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>

Thanks for your patch!

> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -120,6 +120,11 @@
>  #define RZG3L_PLL7_FSTD_DIV_MR_MIN     (8 * MEGA)
>  #define RZG3L_PLL7_FSTD_DIV_MR_MAX     (16 * MEGA)
>
> +#define CPG_PLLDSI_SMUX_LVDS_DUTY_NUM          4
> +#define CPG_PLLDSI_SMUX_LVDS_DUTY_DEN          7
> +#define CPG_PLLDSI_SMUX_DSI_RGB_DUTY_NUM       1
> +#define CPG_PLLDSI_SMUX_DSI_RGB_DUTY_DEN       2
> +
>  /**
>   * struct clk_hw_data - clock hardware data
>   * @hw: clock hw
> @@ -741,6 +746,20 @@ struct dsi_div_hw_data {
>
>  #define to_dsi_div_hw_data(_hw)        container_of(_hw, struct dsi_div_hw_data, hw)
>
> +/**
> + * struct rzg3l_dsi_mux_clk - PLL DSI MUX clock
> + *
> + * @priv: CPG private data
> + * @mux: mux clk
> + */
> +struct rzg3l_dsi_mux_clk {
> +       struct rzg2l_cpg_priv *priv;
> +       struct clk_mux mux;
> +};
> +
> +#define to_plldsi_clk_mux(_mux) \
> +       container_of(_mux, struct rzg3l_dsi_mux_clk, mux)
> +
>  static unsigned long rzg2l_cpg_dsi_div_recalc_rate(struct clk_hw *hw,
>                                                    unsigned long parent_rate)
>  {
> @@ -1402,6 +1421,116 @@ static const struct clk_ops rzg3l_cpg_pll_ops = {
>         .recalc_rate = rzg3s_cpg_pll_clk_recalc_rate,
>  };
>
> +static u8 rzg3l_cpg_dsi_smux_get_parent(struct clk_hw *hw)
> +{
> +       return clk_mux_ops.get_parent(hw);
> +}
> +
> +static int rzg3l_cpg_dsi_smux_set_parent(struct clk_hw *hw, u8 index)
> +{
> +       return clk_mux_ops.set_parent(hw, index);
> +}
> +
> +static int rzg3l_cpg_dsi_smux_determine_rate(struct clk_hw *hw,
> +                                            struct clk_rate_request *req)
> +{
> +       req->best_parent_rate = req->rate;
> +
> +       return 0;

Why no forward to clk_mux_ops.determine_rate()?

> +}

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds