Re: [PATCH] PCI: qcom: Clear Attention Button Present in Slot Capabilities

From: Manivannan Sadhasivam

Date: Mon Jul 13 2026 - 02:12:18 EST


On Fri, Jul 10, 2026 at 12:30:56PM -0500, Bjorn Helgaas wrote:
> On Fri, Jul 10, 2026 at 06:20:57AM -0700, Qiang Yu wrote:
> > Qcom PCIe Root Ports advertise the Attention Button Present (ABP) bit in
> > the Slot Capabilities register, but the slots have no attention button.
>
> I'm a little surprised that this would be hard-wired into the RP
> instead of being some kind of strapping or config option, which would
> allow the SoC to be used in platforms that do have Attention Buttons.
>

For supporting Attention button, we need either one of the 3 mechanisms:

1. OS native: Some entity detecting ATTN# and injecting hotplug event to the
PCIe RP. This requires changes to the SoC design which is not present.

2. OS native: Some entity detecting ATTN# and notifying OS through an OOB
mechanism like GPIO event and the handler manually calling pciehp APIs. This
requires changes to the pcie-qcom driver, which is not present.

3. Firmware first: This requires ACPI and none of the Qcom Linux implementations
support this.

So currently there is no way one can add attention button with Qcom SoC designs
with upstream kernel. If such requirements arise in the future, then we may need
to conditionally enable ATTN# on those designs.

> If it's actually hard-wired, this might be OK. If ABP could be made
> to work in hypothetical platforms that include it, maybe this should
> be based on a DT property?
>

There is no DT property defined in the dtschema for ATTN#. If the requirements
arise in the future, we may end up adding somethig like 'attn-gpios' to the RP
node.

- Mani

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