[PATCH 5/6] spi: add rx and tx lane mask to spi_transfer struct
From: Jonathan Santos
Date: Mon Jul 13 2026 - 22:57:53 EST
In SPI_MULTI_LANE_MODE_STRIPE mode, a transfer currently activates all
available lanes, but some use cases require operating over a subset of
lanes per transfer.
Enable dynamic lane selection for tx and rx by adding new fields to the
spi_transfer struct. Controllers that support multi-lane selection must
parse the transfer struct to update the rx and tx mask lane-wise.
Peripherals need to set values to the new fields only if multi_lane_mode
is set to SPI_MULTI_LANE_MODE_STRIPE and they need to enable at least one
lane, not necessary for enabling all lanes.
Signed-off-by: Jonathan Santos <Jonathan.Santos@xxxxxxxxxx>
---
include/linux/spi/spi.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index a9988db3fe2f..f4473d53b6b5 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -986,6 +986,12 @@ struct spi_res {
* (SPI_NBITS_SINGLE) is used.
* @multi_lane_mode: How to serialize data on multiple lanes. One of the
* SPI_MULTI_LANE_MODE_* values.
+ * @rx_lane_mask: Bitmask of lanes to use for receive in
+ * SPI_MULTI_LANE_MODE_STRIPE mode. Each set bit enables the corresponding
+ * lane. If 0 all available lanes are used.
+ * @tx_lane_mask: Bitmask of lanes to use for transmit in
+ * SPI_MULTI_LANE_MODE_STRIPE mode. Each set bit enables the corresponding
+ * lane. If 0 all available lanes are used.
* @len: size of rx and tx buffers (in bytes)
* @speed_hz: Select a speed other than the device default for this
* transfer. If 0 the default (from @spi_device) is used.
@@ -1131,6 +1137,8 @@ struct spi_transfer {
#define SPI_MULTI_LANE_MODE_STRIPE 1 /* one data word per lane */
#define SPI_MULTI_LANE_MODE_MIRROR 2 /* same word sent on all lanes */
unsigned multi_lane_mode: 2;
+ unsigned rx_lane_mask: 8;
+ unsigned tx_lane_mask: 8;
unsigned timestamped:1;
bool dtr_mode;
--
2.34.1