Re: [PATCH 0/6] spi: add multi-CS and per-transfer lane mask support
From: Andy Shevchenko
Date: Tue Jul 14 2026 - 04:57:35 EST
On Tue, Jul 14, 2026 at 02:55:31AM -0300, Jonathan Santos wrote:
> This series introduces two SPI subsystem features: per-transfer chipselect
> masks and multi-CS device support. Together they address the multi-device
> setup described in [1] and the limitation noted in [2], where no SPI
> controller completely handles logical chip selects beyond the first one.
>
> The first part of the set addresses multi-CS support. Some SPI controllers
> can assert multiple chip selects simultaneously, but the existing code
> hardcoded CS index 0 in both spi_set_cs() and of_spi_parse_dt(),
> preventing this from working.
>
> The second part addresses dynamic lane selection for STRIPE mode. In
> SPI_MULTI_LANE_MODE_STRIPE, all available lanes are currently always
> active. Some peripherals need to select a different subset of rx/tx lanes
> per transfer. New fields are added to the spi_transfer struct to allow
> drivers to specify which lanes to use for each transfer. The documentation
> is also updated to describe this new behavior.
> [1]: https://lore.kernel.org/linux-iio/af0EGv172ZMl%2F6N5@xxxxxxxxxxxxxxxxxxxxxxxxxx/T/#t
> [2]: https://lore.kernel.org/all/20250915183725.219473-1-jonas.gorski@xxxxxxxxx/
Mark usually "merges" a series like this and cover letter goes as merge commit
message. With that in mind, can we use Link tags for the above? Like
Link: ... [1]
Link: ... [2]
--
With Best Regards,
Andy Shevchenko