[PATCH 3/5] PCI/FLIT: Negotiate _OSC control for Flit Error Logging

[Yazen Ghannam]

The Flit Logging Extended Capability may be managed by the platform
firmware. Negotiate ownership through _OSC before the OS enables the
Flit Error Counter, and only register the port service when the OS is
granted native control.

Advertise support via a new OSC_PCI_EXPRESS_FLIT_CONTROL bit, record
the negotiated result in the host bridge's native_flit flag, and gate
the Flit port service on it.

Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
Assisted-by: Claude:claude-opus-4-8
---
 drivers/acpi/pci_root.c    | 6 ++++++
 drivers/pci/pcie/portdrv.c | 2 +-
 drivers/pci/probe.c        | 1 +
 include/linux/acpi.h       | 1 +
 include/linux/pci.h        | 1 +
 5 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 4c06c3ffd0cb..e6f74b8129a3 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -136,6 +136,7 @@ static struct pci_osc_bit_struct pci_osc_control_bit[] = {
 	{ OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
 	{ OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
 	{ OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
+	{ OSC_PCI_EXPRESS_FLIT_CONTROL, "FlitErrorLogging" },
 };
 
 static struct pci_osc_bit_struct cxl_osc_support_bit[] = {
@@ -523,6 +524,9 @@ static u32 calculate_control(void)
 	if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
 		control |= OSC_PCI_EXPRESS_DPC_CONTROL;
 
+	if (IS_ENABLED(CONFIG_PCIE_FLIT))
+		control |= OSC_PCI_EXPRESS_FLIT_CONTROL;
+
 	return control;
 }
 
@@ -1039,6 +1043,8 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 		host_bridge->native_ltr = 0;
 	if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
 		host_bridge->native_dpc = 0;
+	if (!(root->osc_control_set & OSC_PCI_EXPRESS_FLIT_CONTROL))
+		host_bridge->native_flit = 0;
 
 	if (!(root->osc_ext_control_set & OSC_CXL_ERROR_REPORTING_CONTROL))
 		host_bridge->native_cxl_error = 0;
diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index 1a649d6f4ab8..ef224e7243f3 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c
@@ -286,7 +286,7 @@ static int get_port_device_capability(struct pci_dev *dev)
 	}
 
 #ifdef CONFIG_PCIE_FLIT
-	if (dev->flit_cap)
+	if (dev->flit_cap && host->native_flit)
 		services |= PCIE_PORT_SERVICE_FLIT;
 #endif
 
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a1ec44b04eb0..f9183a4ea3b3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -674,6 +674,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
 	bridge->native_pme = 1;
 	bridge->native_ltr = 1;
 	bridge->native_dpc = 1;
+	bridge->native_flit = 1;
 	bridge->domain_nr = PCI_DOMAIN_NR_NOT_SET;
 	bridge->native_cxl_error = 1;
 	bridge->dev.type = &pci_host_bridge_type;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 10d6c6c11bdf..507cd985ff14 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -644,6 +644,7 @@ extern u32 osc_sb_native_usb4_control;
 #define OSC_PCI_EXPRESS_CAPABILITY_CONTROL	0x00000010
 #define OSC_PCI_EXPRESS_LTR_CONTROL		0x00000020
 #define OSC_PCI_EXPRESS_DPC_CONTROL		0x00000080
+#define OSC_PCI_EXPRESS_FLIT_CONTROL		0x00000800
 
 /* CXL _OSC: Capabilities DWORD 4: Support Field */
 #define OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT	0x00000001
diff --git a/include/linux/pci.h b/include/linux/pci.h
index a8d8dbac6640..4e4d1d9eb7fe 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -660,6 +660,7 @@ struct pci_host_bridge {
 	unsigned int	native_pme:1;		/* OS may use PCIe PME */
 	unsigned int	native_ltr:1;		/* OS may use PCIe LTR */
 	unsigned int	native_dpc:1;		/* OS may use PCIe DPC */
+	unsigned int	native_flit:1;		/* OS may use PCIe Flit logging */
 	unsigned int	native_cxl_error:1;	/* OS may use CXL RAS/Events */
 	unsigned int	preserve_config:1;	/* Preserve FW resource setup */
 	unsigned int	size_windows:1;		/* Enable root bus sizing */
-- 
2.53.0