[PATCH 4/5] PCI/FLIT: Add trace event for flit errors

From: Yazen Ghannam

Date: Tue Jul 14 2026 - 14:41:24 EST


Emit a trace event for each erroneous flit logged by the Flit Error
Counter, capturing the counter control/status and both Error Log
registers. This provides a structured, low-overhead record of flit
errors that userspace RAS tooling can consume without parsing the
kernel log.

Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
Assisted-by: Claude:claude-opus-4-8
---
drivers/pci/pcie/Kconfig | 1 +
drivers/pci/pcie/flit.c | 2 ++
include/ras/ras_event.h | 48 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 51 insertions(+)

diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index 1ee3c85e63c1..6a0f3abfbfe7 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -150,6 +150,7 @@ config PCIE_EDR
config PCIE_FLIT
bool "PCI Express Flit Mode Error Logging support"
depends on PCIEPORTBUS
+ select RAS
help
This enables support for the PCI Express Flit Logging Extended
Capability, which logs errors encountered by a port operating
diff --git a/drivers/pci/pcie/flit.c b/drivers/pci/pcie/flit.c
index 12f2b6fbf1de..83cf53f39291 100644
--- a/drivers/pci/pcie/flit.c
+++ b/drivers/pci/pcie/flit.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
+#include <ras/ras_event.h>
#include "portdrv.h"
#include "../pci.h"

@@ -84,6 +85,7 @@ static irqreturn_t flit_isr(int irq, void *context)

pci_read_config_dword(pdev, flit + PCI_FLIT_ERR_LOG2, &err_log2);
pci_info(pdev, HW_ERR " Error Log1: 0x%08x Error Log2: 0x%08x\n", err_log1, err_log2);
+ trace_flit_event(pci_name(pdev), cntr_ctrl, cntr_sta, err_log1, err_log2);

pci_write_config_dword(pdev, flit + PCI_FLIT_ERR_LOG1, err_log1);
} while (err_log1 & PCI_FLIT_ERR_LOG_MORE);
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index fdb785fa4613..0f02928b5cda 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -381,6 +381,54 @@ TRACE_EVENT(aer_event,
"Not available")
);
#endif /* CONFIG_PCIEAER */
+
+/*
+ * PCIe Flit Error Logging trace event
+ *
+ * These events are generated when the Flit Error Counter of a PCIe Gen6
+ * Flit Mode port records one or more erroneous flits.
+ *
+ * char * dev_name - The name of the slot where the device resides
+ * ([domain:]bus:device.function).
+ * u16 cntr_ctrl - Flit Error Counter Control register value.
+ * u16 cntr_sta - Flit Error Counter Status register value.
+ * u32 err_log1 - Flit Error Log 1 register value.
+ * u32 err_log2 - Flit Error Log 2 register value.
+ */
+#ifdef CONFIG_PCIE_FLIT
+TRACE_EVENT(flit_event,
+ TP_PROTO(const char *dev_name,
+ const u16 cntr_ctrl,
+ const u16 cntr_sta,
+ const u32 err_log1,
+ const u32 err_log2),
+
+ TP_ARGS(dev_name, cntr_ctrl, cntr_sta, err_log1, err_log2),
+
+ TP_STRUCT__entry(
+ __string( dev_name, dev_name )
+ __field( u16, cntr_ctrl )
+ __field( u16, cntr_sta )
+ __field( u32, err_log1 )
+ __field( u32, err_log2 )
+ ),
+
+ TP_fast_assign(
+ __assign_str(dev_name);
+ __entry->cntr_ctrl = cntr_ctrl;
+ __entry->cntr_sta = cntr_sta;
+ __entry->err_log1 = err_log1;
+ __entry->err_log2 = err_log2;
+ ),
+
+ TP_printk("%s cntr_ctrl:0x%04x cntr_sta:0x%04x err_log1:0x%08x err_log2:0x%08x",
+ __get_str(dev_name),
+ __entry->cntr_ctrl,
+ __entry->cntr_sta,
+ __entry->err_log1,
+ __entry->err_log2)
+);
+#endif /* CONFIG_PCIE_FLIT */
#endif /* _TRACE_HW_EVENT_MC_H */

/* This part must be outside protection */
--
2.53.0