Re: [PATCH 2/7] irqchip/irq-qcom-mpm: Register MPM under CPU cluster power domain

[Konrad Dybcio]

On 7/15/26 12:49 PM, Stephan Gerhold wrote:
> On Wed, Jul 15, 2026 at 12:45:48PM +0200, Konrad Dybcio wrote:
>> On 7/15/26 12:34 PM, Stephan Gerhold wrote:
>>> On Wed, Jul 15, 2026 at 11:46:58AM +0200, Konrad Dybcio wrote:
>>>> On 7/13/26 12:25 PM, Sneh Mankad wrote:
>>>>> MPM irqchip needs to notify RPM (Resource Power Manager) processor to read
>>>>> the latest wake up capable interrupts when the CPU cluster is entering the
>>>>> deepest idle state. This is done by sending IPC interrupt to RPM and is
>>>>> implemented as .power_off() callback by registering MPM as parent power
>>>>> domain to CPU cluster.

[...]

>>> We probably do need some fallback for the old sm6375/agatii DTBs though.
>>
>> The sleep logic doesn't really matter without the platforms hitting a
>> specific power state anyway, so I'm not sure we actually have to (i.e.
>> the regressed path can't be exercised today anyway)
>>
> 
> So are you saying the MPM is currently assigned as parent to some dummy
> idle states in sm6375/agatti.dtsi, which aren't actually triggering APSS
> shutdown? Or is it just irrelevant because other power resources keep
> the whole platform on (RPM clocks etc)?
> 
> If it's the latter, the question is if we might end up fixing that some
> day without further device tree changes. :')

I wouldn't call them dummy, but I'm not 100% sure they can trigger cxpc
entry..

The latter most likely also applies, although that's based on a guess

Konrad