Re: [PATCH 2/5] PCI: dwc: rcar-gen4: Return error code from .additional_common_init

[Manivannan Sadhasivam]

On Sat, Jul 04, 2026 at 10:25:01PM +0200, Marek Vasut wrote:
> Return error code from .additional_common_init callback and check
> the error code. This is a preparatory patch for R-Car Gen5 support,
> which may return non-zero error code from .additional_common_init.
> 
> Signed-off-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxxxx>
> ---
> Cc: "Krzysztof Wilczyński" <kwilczynski@xxxxxxxxxx>
> Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
> Cc: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> Cc: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
> Cc: Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx>
> Cc: Manivannan Sadhasivam <mani@xxxxxxxxxx>
> Cc: Rob Herring <robh@xxxxxxxxxx>
> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: linux-pci@xxxxxxxxxxxxxxx
> Cc: linux-renesas-soc@xxxxxxxxxxxxxxx
> ---
>  drivers/pci/controller/dwc/pcie-rcar-gen4.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> index 5f7211b91ee5b..7625cd338262d 100644
> --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> @@ -87,7 +87,7 @@ MODULE_FIRMWARE(RCAR_GEN4_PCIE_FIRMWARE_NAME);
>  
>  struct rcar_gen4_pcie;
>  struct rcar_gen4_pcie_drvdata {
> -	void (*additional_common_init)(struct rcar_gen4_pcie *rcar);
> +	int (*additional_common_init)(struct rcar_gen4_pcie *rcar);

Can you also rename this callback as init() and implementations as
rcar_gen4_pcie_{ep}_init()?

Though this callback is a grab-bag of various register settings, naming it as
just '.init()' will make it more readable and less redundant.

- Mani

>  	int (*ltssm_control)(struct rcar_gen4_pcie *rcar, bool enable);
>  	enum dw_pcie_device_mode mode;
>  };
> @@ -241,11 +241,16 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar)
>  	reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
>  	fsleep(1000);
>  
> -	if (rcar->drvdata->additional_common_init)
> -		rcar->drvdata->additional_common_init(rcar);
> +	if (rcar->drvdata->additional_common_init) {
> +		ret = rcar->drvdata->additional_common_init(rcar);
> +		if (ret)
> +			goto err_deassert;
> +	}
>  
>  	return 0;
>  
> +err_deassert:
> +	reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
>  err_unprepare:
>  	clk_bulk_disable_unprepare(DW_PCIE_NUM_CORE_CLKS, dw->core_clks);
>  
> @@ -681,7 +686,7 @@ static int r8a779f0_pcie_ltssm_control(struct rcar_gen4_pcie *rcar, bool enable)
>  	return 0;
>  }
>  
> -static void rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *rcar)
> +static int rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *rcar)
>  {
>  	struct dw_pcie *dw = &rcar->dw;
>  	u32 val;
> @@ -695,6 +700,8 @@ static void rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *rcar)
>  	val = readl(rcar->base + PCIEPWRMNGCTRL);
>  	val |= APP_CLK_REQ_N | APP_CLK_PM_EN;
>  	writel(val, rcar->base + PCIEPWRMNGCTRL);
> +
> +	return 0;
>  }
>  
>  static void rcar_gen4_pcie_phy_reg_update_bits(struct rcar_gen4_pcie *rcar,
> -- 
> 2.53.0
> 

-- 
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