Re: [PATCH v8 1/4] dt-bindings: i2c: qcom,i2c-geni: Document multi-owner controller support

From: Mukesh Savaliya

Date: Thu Jul 16 2026 - 08:42:30 EST



On 7/16/2026 8:44 AM, Bjorn Andersson wrote:
[...]

--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml
@@ -60,6 +60,22 @@ properties:
power-domains:
maxItems: 1
+ qcom,qup-multi-owner:
+ type: boolean
+ description:
+ Indicates that the QUP-based controller is shared with one or more
+ other system processors and must not be assumed to have exclusive
+ ownership by the operating system.
+
+ The associated GPIOs must not be reconfigured into a sleep state
+ during runtime suspend, as doing so may disrupt transactions
+ initiated by another owner of the controller.

I think this should be made even clearer that this defined a requirement
on the operating system. I also think that "sleep state" is a misnomer,
it's not the sleep state as such that is the problem (what happens if I
define a sleep state with functional settings, or what happens if I
define an "idle" state?)
Agree, only mentioning of sleep state may misguide. Rather, will make it reverse, what you have pointed below.

One way to handle this would be to declare that only "default" state is
allowed, when this property is specified.

If we still want this, I think it should be rephrased something like:

"""
When this option is present the Operating System must ignore any
non-default pinctrl state configuration, as reconfiguring the associated
pins might disrupt transactions initiated by another owner of the
controller.
"""

Thanks for clarity ! Will update in next patch. Let me finalize Patch 2 with alignment to DMA.
Regards,
Bjorn

+
+ Each owner is responsible for maintaining any resource votes
+ required for operation of the shared controller (for example clocks,
+ power domains, interconnect bandwidth, or other platform-specific
+ resources)
+
reg:
maxItems: 1
--
2.43.0