RE: [PATCH v2] PCI: imx6: Add runtime PM support for i.MX95

From: Hongxing Zhu (OSS)

Date: Thu Jul 16 2026 - 22:34:42 EST


> -----Original Message-----
> From: Manivannan Sadhasivam <mani@xxxxxxxxxx>
> Sent: Friday, July 17, 2026 12:44 AM
> To: Hongxing Zhu (OSS) <hongxing.zhu@xxxxxxxxxxx>
> Cc: Frank Li <frank.li@xxxxxxx>; l.stach@xxxxxxxxxxxxxx; lpieralisi@xxxxxxxxxx;
> kwilczynski@xxxxxxxxxx; robh@xxxxxxxxxx; bhelgaas@xxxxxxxxxx;
> s.hauer@xxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; linux-
> pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; Hongxing Zhu <hongxing.zhu@xxxxxxx>
> Subject: Re: [PATCH v2] PCI: imx6: Add runtime PM support for i.MX95
>
> On Wed, Jul 08, 2026 at 11:59:26AM +0800, hongxing.zhu@xxxxxxxxxxx wrote:
> > From: Richard Zhu <hongxing.zhu@xxxxxxx>
> >
> > Enable runtime PM support for i.MX95 PCIe Root Complex to allow
> > dynamic power management when the PCIe link is idle.
> >
> > The i.MX95 PCIe controller supports entering D3hot state when PCIe
> > devices are not actively in use. This implementation uses
> > pm_runtime_no_callbacks() to leverage the PCI core's generic runtime
> > PM handling. The PCI core automatically manages D-state transitions
> > based on the runtime PM state of connected endpoint devices.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
>
> Please resend this patch separately. Currently, you've sent other patches as a
> reply to this patch which just messes up the order.
Thanks for kindly reminder.
I noticed that issue and resent the patch yesterday.
https://lore.kernel.org/imx/20260715073024.1377228-1-hongxing.zhu@xxxxxxxxxxx/

Best Regards
Richard Zhu

>
> - Mani
>
> > ---
> > Changes in v2:
> > Use devm_pm_runtime_set_active_enabled() simplify the codes and error
> > path.
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index eae495a1b7990..578410f262aed 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -130,6 +130,7 @@ enum imx_pcie_variants {
> > #define IMX_PCIE_FLAG_SKIP_L23_READY BIT(12)
> > /* Preserve MSI capability for platforms that require it */
> > #define IMX_PCIE_FLAG_KEEP_MSI_CAP BIT(13)
> > +#define IMX_PCIE_FLAG_PM_RUNTIME BIT(14)
> >
> > #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
> >
> > @@ -1973,6 +1974,13 @@ static int imx_pcie_probe(struct platform_device
> *pdev)
> > */
> > imx_pcie_add_lut_by_rid(imx_pcie, 0);
> > } else {
> > + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME) {
> > + pm_runtime_no_callbacks(dev);
> > + ret = devm_pm_runtime_set_active_enabled(dev);
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > /*
> > * i.MX RC is powered off during suspend, force L2 entry to
> > * ensure proper endpoint notification before power loss.
> > @@ -2121,6 +2129,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> > .flags = IMX_PCIE_FLAG_HAS_SERDES |
> > IMX_PCIE_FLAG_HAS_LUT |
> > IMX_PCIE_FLAG_8GT_ECN_ERR051586 |
> > + IMX_PCIE_FLAG_PM_RUNTIME |
> > IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> > .ltssm_off = IMX95_PE0_GEN_CTRL_3,
> > .ltssm_mask = IMX95_PCIE_LTSSM_EN,
> > --
> > 2.34.1
> >
>
> --
> மணிவண்ணன் சதாசிவம்