[PATCH v3 1/2] dt-bindings: clock: qcom: Add Qualcomm Maili video clock controller
From: Jagadeesh Kona
Date: Fri Jul 17 2026 - 00:19:28 EST
Add device tree bindings for the video clock controller on Qualcomm
Maili SoC.
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@xxxxxxxxxxxxxxxx>
---
.../bindings/clock/qcom,sm8450-videocc.yaml | 2 +
include/dt-bindings/clock/qcom,maili-videocc.h | 50 ++++++++++++++++++++++
2 files changed, 52 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index 1e1fec1cd7ce96f103348baf85341e775fac690a..910c6d5672b8657f161058c4ceba98637c299b73 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
@@ -18,6 +18,7 @@ description: |
include/dt-bindings/clock/qcom,glymur-videocc.h
include/dt-bindings/clock/qcom,hawi-videocc.h
include/dt-bindings/clock/qcom,kaanapali-videocc.h
+ include/dt-bindings/clock/qcom,maili-videocc.h
include/dt-bindings/clock/qcom,sm8450-videocc.h
include/dt-bindings/clock/qcom,sm8650-videocc.h
include/dt-bindings/clock/qcom,sm8750-videocc.h
@@ -29,6 +30,7 @@ properties:
- qcom,glymur-videocc
- qcom,hawi-videocc
- qcom,kaanapali-videocc
+ - qcom,maili-videocc
- qcom,sm8450-videocc
- qcom,sm8475-videocc
- qcom,sm8550-videocc
diff --git a/include/dt-bindings/clock/qcom,maili-videocc.h b/include/dt-bindings/clock/qcom,maili-videocc.h
new file mode 100644
index 0000000000000000000000000000000000000000..f8461048b04d43cc39606b415273c17eb5106dcf
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,maili-videocc.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MAILI_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MAILI_H
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_AHB_CLK 0
+#define VIDEO_CC_AHB_CLK_SRC 1
+#define VIDEO_CC_MVS0_CLK 2
+#define VIDEO_CC_MVS0_CLK_SRC 3
+#define VIDEO_CC_MVS0_FREERUN_CLK 4
+#define VIDEO_CC_MVS0_SHIFT_CLK 5
+#define VIDEO_CC_MVS0_VPP0_CLK 6
+#define VIDEO_CC_MVS0_VPP0_FREERUN_CLK 7
+#define VIDEO_CC_MVS0B_CLK 8
+#define VIDEO_CC_MVS0B_CLK_SRC 9
+#define VIDEO_CC_MVS0B_FREERUN_CLK 10
+#define VIDEO_CC_MVS0C_CLK 11
+#define VIDEO_CC_MVS0C_CLK_SRC 12
+#define VIDEO_CC_MVS0C_DEBUG_CLK 13
+#define VIDEO_CC_MVS0C_FREERUN_CLK 14
+#define VIDEO_CC_MVS0C_SHIFT_CLK 15
+#define VIDEO_CC_PLL0 16
+#define VIDEO_CC_PLL1 17
+#define VIDEO_CC_PLL2 18
+#define VIDEO_CC_SLEEP_CLK 19
+#define VIDEO_CC_TS_XO_CLK 20
+#define VIDEO_CC_XO_CLK 21
+#define VIDEO_CC_XO_CLK_SRC 22
+
+/* VIDEO_CC power domains */
+#define VIDEO_CC_MVS0_GDSC 0
+#define VIDEO_CC_MVS0_VPP0_GDSC 1
+#define VIDEO_CC_MVS0C_GDSC 2
+
+/* VIDEO_CC resets */
+#define VIDEO_CC_INTERFACE_BCR 0
+#define VIDEO_CC_MVS0_BCR 1
+#define VIDEO_CC_MVS0_CLK_ARES 2
+#define VIDEO_CC_MVS0_FREERUN_CLK_ARES 3
+#define VIDEO_CC_MVS0_VPP0_BCR 4
+#define VIDEO_CC_MVS0C_BCR 5
+#define VIDEO_CC_MVS0C_CLK_ARES 6
+#define VIDEO_CC_MVS0C_FREERUN_CLK_ARES 7
+#define VIDEO_CC_XO_CLK_ARES 8
+
+#endif
--
2.34.1