Re: [PATCH v6 1/5] spi: dt-bindings: Add spi-device-addr peripheral property
From: Mark Brown
Date: Fri Jul 17 2026 - 07:52:20 EST
On Thu, Jul 16, 2026 at 06:06:13PM +0100, Conor Dooley wrote:
> On Thu, Jul 16, 2026 at 01:28:15PM +0100, Mark Brown wrote:
> > Oh, isn't that just multi-pin chip selects then:
> > https://patch.msgid.link/cover.1783729282.git.Jonathan.Santos@xxxxxxxxxx
> No, I think that's something different.
> In this case, there is one chip select that all instances of the device
> share. Both the ADI and Microchip devices then use the upper bits of the
> first/address byte during reads and write to access individual devices.
> In the microchip case that I'm familiar with, what upper bits the device
> responds to are set by fuses in the factory. They also share the same MOSI
> and MISO.
I'm struggling to identify a way in which this is functionally different
to a multi-pin chip select.
> The SPI core already supports two of these devices from Microchip, since
> it just modifies the contents of tx_buf in a spi_transfer.
When I said we'd have to modify the bitstream I was told that wasn't the
case and this was just asserting more pins along with the "chip select".
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