[PATCH v2 1/1] dt-bindings: soc: imx-iomuxc-gpr: allow bridge@18 as child node
From: Frank . Li
Date: Fri Jul 17 2026 - 16:16:33 EST
From: Frank Li <Frank.Li@xxxxxxx>
The legacy i.MX6SX (>15 year) SoC imx-iomuxc-gpr contains one LDB_CTRL
register. Allow the LVDS Display Bridge(LDB) child node under
imx-iomuxc-gpr.
Fix below CHECK_DTBS warnings:
arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dtb: syscon@20e4000 (fsl,imx6sx-iomuxc-gpr): '#address-cells', '#size-cells', 'bridge@18' do not match any of the regexes: '^ipu[12]_csi[01]_mux$', '^pinctrl-[0-9]+$
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
change in v2
- remove status = "disabled" at example
---
.../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml
index 721a67e84c137..e1fbdc7e4e057 100644
--- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml
@@ -47,10 +47,21 @@ properties:
reg:
maxItems: 1
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
mux-controller:
type: object
$ref: /schemas/mux/reg-mux.yaml
+ bridge@18:
+ type: object
+ $ref: /schemas/display/bridge/fsl,ldb.yaml#
+ unevaluatedProperties: false
+
patternProperties:
"^ipu[12]_csi[01]_mux$":
type: object
@@ -67,6 +78,18 @@ allOf:
patternProperties:
'^ipu[12]_csi[01]_mux$': false
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ const: fsl,imx6sx-iomuxc-gpr
+ then:
+ properties:
+ bridge@18: false
+ '#address-cells': false
+ '#size-cells': false
+
additionalProperties: false
required:
@@ -87,4 +110,39 @@ examples:
};
};
+ - |
+ #include <dt-bindings/clock/imx6sx-clock.h>
+
+ syscon@20e4000 {
+ compatible = "fsl,imx6sx-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x020e4000 0x4000>;
+
+ bridge@18 {
+ compatible = "fsl,imx6sx-ldb";
+ reg = <0x18 0x4>;
+ clocks = <&clks IMX6SX_CLK_LDB_DI0>;
+ clock-names = "ldb";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ endpoint {
+ };
+ };
+ };
+ };
+ };
...
--
2.43.0