[PATCH 2/6] media: qcom: camss: Prepare CSID for C-PHY support in gen3
From: Anusha Arun Nandi
Date: Fri Jul 17 2026 - 19:14:22 EST
From: Jigarkumar Zala <jigarkumar.zala@xxxxxxxxxxxxxxxx>
Program the gen3 CSID CSI2 RX PHY type field from the configured PHY
type. The RX path needs this value to distinguish C-PHY from D-PHY
input, so leaving it at the default makes C-PHY configuration
incomplete.
Co-developed-by: Anusha Arun Nandi <anusha.nandi@xxxxxxxxxxxxxxxx>
Signed-off-by: Anusha Arun Nandi <anusha.nandi@xxxxxxxxxxxxxxxx>
Signed-off-by: Jigarkumar Zala <jigarkumar.zala@xxxxxxxxxxxxxxxx>
---
drivers/media/platform/qcom/camss/camss-csid-gen3.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen3.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
index 0fdbf75fb27d..a9c7934907a8 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-gen3.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
@@ -66,6 +66,7 @@
#define CSI2_RX_CFG0_VC_MODE 3
#define CSI2_RX_CFG0_DL0_INPUT_SEL 4
#define CSI2_RX_CFG0_PHY_NUM_SEL 20
+#define CSI2_RX_CFG0_PHY_TYPE_SEL 24
#define CSI2_RX_CFG0_TPG_MUX_EN BIT(27)
#define CSI2_RX_CFG0_TPG_MUX_SEL GENMASK(29, 28)
@@ -115,6 +116,7 @@ static void __csid_configure_rx(struct csid_device *csid,
camss = csid->camss;
val = (phy->lane_cnt - 1) << CSI2_RX_CFG0_NUM_ACTIVE_LANES;
+ val |= phy->phy_sel << CSI2_RX_CFG0_PHY_TYPE_SEL;
val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL;
if (camss->tpg && csid->tpg_linked &&
--
2.34.1