Re: [PATCH net-next v6 1/2] net: dsa: realtek: rtl8365mb: add SGMII support for RTL8367S

From: Luiz Angelo Daros de Luca

Date: Sat Jul 18 2026 - 01:41:30 EST


If the cold-soak issue is indeed device-related, it might be that the
driver is loading too early in the boot process. Stanislaw reported
that reloading the module makes everything work as expected.

I don't see why the second reset would behave better than the first
one. In fact, if the reset pin is connected and configured, the driver
will reset the ASIC twice during the probe. Stanislaw, do you have a
reset pin or a reset controller configured? That might be related.

The driver currently performs a full software ASIC reset via bit(0),
but there are other reset bits available that you could try:

##### **Family B, C, D:**

```
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
| RESERVED |GPH|NIC|805|SDS|CFG|SW |CHP|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
```
* **GPH (6:6)**: `GPHY_RESET`. Gigphy (Copper PHYs) Reset.
* **NIC (5:5)**: `NIC_RST`. Network Interface Controller Reset.
* **805 (4:4)**: `DW8051_RST`. Internal DW8051 MCU Reset.
* **SDS (3:3)**: `SDS_RST`. SerDes Reset.
* **CFG (2:2)**: `CONFIG_RST`. Configuration register soft reset.
* **SW (1:1)**: `SW_RST`. Software Reset (`0x0002`). Clears soft state.
* **CHP (0:0)**: `CHIP_RST`. Chip (ASIC) full reset (`0x0001`).

I would expect the CHIP_RST (bit 0) to clear everything, but you never
know... Also, keeping DW8051_RST asserted indefinitely might be
overkill.

This series adds a required feature for several devices. Even if it
introduces an edge-case issue for a few of them, lacking this feature
entirely is worse. If a patch is proposed to fix the cold-soak boot
issue, we can review it here as usual.

I would feel more comfortable if I could test this code myself, but my
device only uses RGMII. Anyway, everything looks good. Thanks, Johan.

Reviewed-by: Luiz Angelo Daros de Luca <luizluca@xxxxxxxxx>