Re: [PATCH v8 08/22] RISC-V: Add Sscfg extension CSR definition
From: Charlie Jenkins
Date: Mon Jul 20 2026 - 03:27:03 EST
On Wed, 01 Jul 2026 01:46:56 -0700, Atish Patra <atish.patra@xxxxxxxxx> wrote:
> This adds the scountinhibit CSR definition and S-mode accessible hpmevent
> bits defined by smcdeleg/ssccfg. scountinhibit allows S-mode to start/stop
> counters directly from S-mode without invoking SBI calls to M-mode. It is
> also used to figure out the counters delegated to S-mode by the M-mode as
> well.
>
> Signed-off-by: Kaiwen Xue <kaiwenx@xxxxxxxxxxxx>
Does this need to be signed off by you?
Reviewed-by: Charlie Jenkins <thecharlesjenkins@xxxxxxxxx>
Tested-by: Charlie Jenkins <thecharlesjenkins@xxxxxxxxx>
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- Charlie