Re: [PATCH v2] of: property: Create devlink between PCI Host bridge and Root Port supplies

[Konrad Dybcio]

On 5/8/26 12:32 PM, Konrad Dybcio wrote:
> On 5/6/26 9:56 AM, Manivannan Sadhasivam wrote:
>> Recently, devicetree started to represent the PCI Host bridge supplies like
>> PHY in the Root Port nodes as seen in commit 38fcbfbd4207
>> ("dt-bindings: PCI: qcom: Move PHY & reset GPIO to Root Port node"). But
>> the Host bridge drivers still control the Root Port supplies as a part of
>> their controller initialization/deinitialization sequence.

[...]

>> +	/*
>> +	 * Since the host bridge drivers parse and control the Root Port
>> +	 * supplies, create a devlink between host bridge and Root Port
>> +	 * supplies. This will prevent the host bridge drivers from being
>> +	 * probed before the supplies become available.
>> +	 *
>> +	 * For checking the host bridge node, first ensure that it is a PCI node
>> +	 * and its parent is not a PCI node. Only host bridge nodes will have
>> +	 * this structure.
>> +	 */
>> +	if (of_node_is_type(con_np, "pci") && !of_node_is_type(con_np->parent, "pci")) {
>> +		for_each_available_child_of_node_scoped(con_np, child) {
>> +			if (of_node_is_type(child, "pci")) {
> 
> Doesn't this go a level too deep now? (a change vs v1)
> 
> for example, in x1e80100.dtsi:
> 
> con_np = &pcie3_port0
> con_np->parent = &pcie3
> 
> And I think the code now looks for device(such that device_type="pci")
> *under* &pcie3_port0

No, clearly I managed to misunderstand this.

Tested-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx> # Glymur CRD
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad