Re: [PATCH RESEND v1 net] ptp: netc: explicitly clear TMR_OFF during initialization

[Breno Leitao]

On Mon, Jul 20, 2026 at 09:25:08AM +0800, wei.fang@xxxxxxxxxxx wrote:
> From: Clark Wang <xiaoning.wang@xxxxxxx>
> 
> The NETC timer does not support function level reset, so TMR_OFF_L/H
> registers are not cleared by pcie_flr(). If TMR_OFF was set to a
> non-zero value in a previous binding, it will persist across driver
> rebind and cause inaccurate PTP time.
> 
> There is also a hardware issue: after a warm reset or soft reset,
> TMR_OFF_L/H registers appear to be cleared to zero, but the timer clock
> domain internally retains the stale value. When the timer is re-enabled,
> TMR_CUR_TIME continues to track the old offset until TMR_OFF is written
> explicitly. This can cause incorrect PTP timestamps and even PTP clock
> synchronization failures.
> 
> Per the recommendation from the IP team, explicitly write 0 to TMR_OFF
> in netc_timer_init() to flush the internally cached value and ensure
> TMR_CUR_TIME follows the freshly initialized counter.
> 
> Fixes: 87a201d59963 ("ptp: netc: add NETC V4 Timer PTP driver support")
> Signed-off-by: Clark Wang <xiaoning.wang@xxxxxxx>
> Signed-off-by: Wei Fang <wei.fang@xxxxxxx>
> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@xxxxxxxxx>

Reviewed-by: Breno Leitao <leitao@xxxxxxxxxx>