[PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

From: Frank . Li

Date: Mon Jul 20 2026 - 17:11:19 EST


From: Frank Li <Frank.Li@xxxxxxx>

Add usb@5b0e0000 and related node for i.MX8QM.

Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 34 +++++++++++++++++++++++
1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 1370a571153a5..c7063aaac4a34 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -4,6 +4,40 @@
* Dong Aisheng <aisheng.dong@xxxxxxx>
*/

+&{/} {
+ usbphynop2: usbphynop2 {
+ compatible = "usb-nop-xceiv";
+ clocks = <&usb2_lpcg IMX_LPCG_CLK_7>;
+ clock-names = "main_clk";
+ power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+ status = "disabled";
+ };
+};
+
+&conn_subsys {
+ usbh1: usb@5b0e0000 {
+ compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb";
+ reg = <0x5b0e0000 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ phy_type = "hsic";
+ dr_mode = "host";
+ clocks = <&usb2_lpcg IMX_LPCG_CLK_6>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x10>;
+ rx-burst-size-dword = <0x10>;
+ power-domains = <&pd IMX_SC_R_USB_1>;
+ fsl,usbphy = <&usbphynop2>;
+ fsl,usbmisc = <&usbmisc2 0>;
+ };
+
+ usbmisc2: usbmisc@5b0e0200 {
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
+ #index-cells = <1>;
+ reg = <0x5b0e0200 0x200>;
+ };
+};
+
&usbphy1 {
compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy";
};

--
2.43.0