Re: [PATCH v10 1/6] x86/cpufeatures: Add X86_FEATURE_RMPOPT feature flag

[Borislav Petkov]

On Tue, Jun 30, 2026 at 06:09:44PM +0000, Ashish Kalra wrote:
>  arch/x86/include/asm/cpufeatures.h       | 2 +-
>  arch/x86/kernel/cpu/scattered.c          | 1 +
>  tools/arch/x86/include/asm/cpufeatures.h | 2 +-

Yeah, apparently we don't do the tools/ change anymore:

https://lore.kernel.org/r/0af5122c-20df-4aea-8ab4-cba63f71dc3b@xxxxxxx

Final version:

Author: Ashish Kalra <ashish.kalra@xxxxxxx>
Date:   Tue Jun 30 18:09:44 2026 +0000

    x86/cpufeatures: Add X86_FEATURE_RMPOPT feature flag
    
    Add a flag indicating whether RMPOPT instruction is supported.
    
    RMPOPT is a new instruction that reduces the performance overhead of RMP
    checks for the hypervisor and non-SNP guests by allowing those checks to be
    skipped when 1-GB memory regions are known to contain no SEV-SNP guest memory.
    
    For more information on the RMPOPT instruction, see the AMD64 RMPOPT
    technical documentation.
    
      [ bp: Zap respective tools/ change. ]
    
    Suggested-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
    Signed-off-by: Ashish Kalra <ashish.kalra@xxxxxxx>
    Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
    Reviewed-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
    Reviewed-by: Ackerley Tng <ackerleytng@xxxxxxxxxx>
    Link: https://patch.msgid.link/39e9ee269a572c516a3f4e937bfe12d00697d5e6.1782841284.git.ashish.kalra@xxxxxxx

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 3d0940a3b9f3..dbccde9ee5cd 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -76,7 +76,7 @@
 #define X86_FEATURE_K8			( 3*32+ 4) /* Opteron, Athlon64 */
 #define X86_FEATURE_ZEN5		( 3*32+ 5) /* CPU based on Zen5 microarchitecture */
 #define X86_FEATURE_ZEN6		( 3*32+ 6) /* CPU based on Zen6 microarchitecture */
-/* Free                                 ( 3*32+ 7) */
+#define X86_FEATURE_RMPOPT		( 3*32+ 7) /* Support for AMD RMPOPT instruction */
 #define X86_FEATURE_CONSTANT_TSC	( 3*32+ 8) /* "constant_tsc" TSC ticks at a constant rate */
 /* free: was #define X86_FEATURE_UP	( 3*32+ 9) * "up" SMP kernel running on UP */
 #define X86_FEATURE_ART			( 3*32+10) /* "art" Always running timer (ART) */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 937129ce6a96..021c0bf22de2 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -67,6 +67,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_PERFMON_V2,		CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,		CPUID_EAX,  1, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
+	{ X86_FEATURE_RMPOPT,			CPUID_EDX,  0, 0x80000025, 0 },
 	{ X86_FEATURE_AMD_HTR_CORES,		CPUID_EAX, 30, 0x80000026, 0 },
 	{ 0, 0, 0, 0, 0 }
 };

-- 
Regards/Gruss,
    Boris.

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