Re: [PATCH 2/2] firmware: stratix10-svc: add support for agilex5

[Dinh Nguyen]

On 6/22/26 08:44, Adrian Ng Ho Yin wrote:
> On Agilex5 the DDR base address starts at 0x8000_0000, which is
> outside the addressable range of the SDM. The SMMU is used to remap
> DDR-allocated buffers to an IOVA within the SDM-accessible 0-512MB
> window. Return -ENODEV at probe if no IOMMU domain is found for an
> intel,agilex5-svc device.
>
> Configure a 29-bit DMA mask to constrain IOVA allocations to the
> 0-512MB range accessible to the SDM. Agilex5 REV B introduced a
> hardware SDM address remapper; bypass it via SMC so no additional
> offset is applied to the IOVA, keeping the implementation
> consistent across all Agilex5 revisions.
>
> ATF validates FPGA_CONFIG_WRITE addresses against the DDR range
> starting at 0x8000_0000. Since IOVAs are below 0x2000_0000, the
> driver adds 0x8000_0000 to the IOVA before the SMC call so ATF's
> is_address_in_ddr_range() check passes. ATF then strips the offset
> and uses the SMMU to translate the remaining IOVA to the underlying
> physical memory for SDM access.
>
> The firmware COMPLETED_WRITE response returns the raw IOVA without
> the 0x8000_0000 offset. Compensate by storing dma_addr_offset in
> the controller and adding it back before the svc_pa_to_va() lookup.
> dma_addr_offset is zero on non-SMMU paths so existing platforms are
> unaffected.
>
> Fix a pre-existing bug in stratix10_svc_free_memory() where an
> unknown-address fallthrough called list_del(&svc_data_mem),
> corrupting the list head. Replace it with dev_warn().
>
> Register a devm cleanup action at probe to reclaim any DMA
> coherent buffers that service clients fail to free before driver
> unbind, preventing memory leaks across probe/remove cycles.
>
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>

There's alot going on with this patch! Can you split it up into smaller 
bits? And what part of this patch needed for the DTS patch?

Dinh