Re: [PATCH v7 2/2] hwmon: add Altera SoC FPGA hardware monitoring driver

From: Guenter Roeck

Date: Mon Jul 20 2026 - 23:08:40 EST


On 7/20/26 19:18, tze.yee.ng@xxxxxxxxxx wrote:
From: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>

Add a hardware monitor driver for Altera SoC FPGA devices using the
Stratix 10 service layer. Sensor channels are selected based on the
service layer compatible string.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>
Signed-off-by: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>
---
...
+
+static int socfpga_hwmon_sync_read(struct device *dev,
+ enum hwmon_sensor_types type,
+ struct stratix10_svc_client_msg *msg)
+{
+ struct socfpga_hwmon_priv *priv = dev_get_drvdata(dev);
+ int ret;
+
+ reinit_completion(&priv->completion);
+
+ if (type == hwmon_temp)
+ priv->client.receive_cb = socfpga_hwmon_readtemp_cb;
+ else
+ priv->client.receive_cb = socfpga_hwmon_readvolt_cb;
+
+ ret = stratix10_svc_send(priv->chan, msg);
+ if (ret < 0)
+ goto status_done;
+
+ ret = wait_for_completion_timeout(&priv->completion, HWMON_TIMEOUT);
+ if (!ret) {
+ dev_err(priv->client.dev, "timeout waiting for SMC call\n");
+ /*
+ * stratix10_svc_done() stops the worker but does not flush
+ * svc_fifo. Wait for the outstanding callback before stopping
+ * so a leftover request cannot complete a later sensor read.
+ * Discard the late result and still report -ETIMEDOUT.
+ */
+ wait_for_completion(&priv->completion);

Just like Sashiko, I am puzzled and do not understand this code.

Guenter