Re: [PATCH v5 4/7] KVM: arm64: Skip pKVM stage-2 flush when FWB is enabled

[Bradley Morgan]

On July 17, 2026 2:03:14 PM GMT+01:00, Fuad Tabba <fuad.tabba@xxxxxxxxx>
wrote:
>pkvm_pgtable_stage2_flush() cleans the D-cache for every mapping in the
>range even on hardware with stage-2 Force Write-Back, where FWB keeps
>guest memory coherent to the PoC and the maintenance is unnecessary. The
>generic kvm_pgtable_stage2_flush() returns early in that case, but the
>pKVM MMU does not, so it needlessly cleans the whole range on, e.g.,
>every set/way trap.
>
>Return early when FWB is enabled, matching the generic walker.
>
>Fixes: e912efed485a ("KVM: arm64: Introduce the EL1 pKVM MMU")
>Signed-off-by: Fuad Tabba <fuad.tabba@xxxxxxxxx>

LGTM,

Reviewed-by: Bradley Morgan <include@xxxxxxxxx>

>---
> arch/arm64/kvm/pkvm.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/arch/arm64/kvm/pkvm.c b/arch/arm64/kvm/pkvm.c
>index f70c601dcf4c..ba6570e37545 100644
>--- a/arch/arm64/kvm/pkvm.c
>+++ b/arch/arm64/kvm/pkvm.c
>@@ -518,6 +518,10 @@ int pkvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size)
> 	struct pkvm_mapping *mapping;
> 
> 	lockdep_assert_held(&kvm->mmu_lock);
>+
>+	if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))
>+		return 0;
>+
> 	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping) {
> 		if (!mapping->nc)
> 			__clean_dcache_guest_page(pfn_to_kaddr(mapping->pfn),
>

Thanks!