Re: [PATCH bpf-next v4 0/3] riscv, bpf: Add support for signed operations and 32-bit atomics

[patchwork-bot+netdevbpf]

Hello:

This series was applied to bpf/bpf-next.git (master)
by Kumar Kartikeya Dwivedi <memxor@xxxxxxxxx>:

On Tue, 14 Jul 2026 00:24:48 +0000 you wrote:
> Add support for missing signed operations and 32-bit atomics in the
> RV32 BPF JIT compiler.
> 
> The current implementation lacks support for BPF_SDIV, BPF_SMOD, and
> BPF_MOVSX, ignoring the instruction offset field and treating them as
> unsigned or zero-extended. Introduce support for these operations by
> checking the offset field and emitting the corresponding instructions.
> 
> [...]

Here is the summary with links:
  - [bpf-next,v4,1/3] riscv, bpf: Add support for BPF_SDIV and BPF_SMOD in RV32 JIT
    https://git.kernel.org/bpf/bpf-next/c/2e0fa2389c50
  - [bpf-next,v4,2/3] riscv, bpf: Add support for BPF_MOVSX in RV32 JIT
    https://git.kernel.org/bpf/bpf-next/c/c6a08afdfe3a
  - [bpf-next,v4,3/3] riscv, bpf: Add 32 bit atomic operations to RV32 JIT
    https://git.kernel.org/bpf/bpf-next/c/a1b37972efc0

You are awesome, thank you!
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