Re: [PATCH v4 3/3] clk: ultrarisc: Add DP1000 clock driver
From: Brian Masney
Date: Tue Jul 21 2026 - 18:19:19 EST
On Mon, Jul 20, 2026 at 08:38:06AM +0800, Jia Wang via B4 Relay wrote:
> From: Jia Wang <wangjia@xxxxxxxxxxxxx>
>
> Add a clock driver for the UltraRISC DP1000 SoC.
>
> The clock tree is driven by a SYSPLL and provides fixed-factor clocks for
> the subsystem and PCIe, divider-based root clocks for GMAC and the UART,
> I2C, and SPI blocks, and per-instance gate clocks for UART0-3, I2C0-3,
> and SPI0-1.
>
> Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>
Reviewed-by: Brian Masney <bmasney@xxxxxxxxxx>