Re: [PATCH 3/3] iio: adc: ti-ads112c14: add support for buffered read

[David Lechner]

On 7/19/26 7:55 PM, Jonathan Cameron wrote:
> On Tue, 14 Jul 2026 19:19:32 -0500
> "David Lechner (TI)" <dlechner@xxxxxxxxxxxx> wrote:
> 
>> Add support for buffered reads using a triggered buffer.
>>
>> The device has a continuous conversion mode, but that can only be used
>> with one channel at a time since there is nothing like a sequencer to
>> support that in hardware. Instead, we use single-shot reads like we do
>> for direct reads to be able to read multiple channels.
>>
>> Support for continuous conversion mode could be added in the future if
>> needed via a 2nd buffer.
> 
> How about enabling that if only one channel is requested?  I vaguely recall
> us doing that for another driver (though I might be dreaming :)  I did
> see your comment in the cover letter about it affecting timing and that
> making life complex.  Fine to leave considering this for another day
> but maybe don't suggest a particular solution here.
> 
Actually, my latest thought it to do it by trigger type. This chip has
a DRDY interrupt that can be used as the trigger for the continuous
conversion mode but we need some software trigger to the single-shot
mode. It think this would take care of the timing issues as well.

The logic would be that if the self trigger (DRDY) is selected in
the trigger/current_trigger attribute, then buffered read will use
continuous mode and fail if more than one channel is enabled. If
another (software) trigger is enabled, then use single-shot mode
and allow multiple channels.

The timing issue is that (or will be since I haven't sent the relevant
patches yet) there is a settling delay before the first sample. For
single-shot mode, every sample is considered the first sample (because
it is "single"), so the chip applies this settling time on every sample.
So it might be good enough to just document that as a quirk of software
triggers for this particular chip since they would be using single-shot
mode?