RE: [PATCH v10 08/11] clk: realtek: Add support for MMC-tuned PLL clocks

[Yu-Chun Lin [林祐君]]

Hi Brian,

> On Mon, Jul 13, 2026 at 11:56:27PM +0800, Yu-Chun Lin wrote:
> > From: Cheng-Yu Lee <cylee12@xxxxxxxxxxx>
> >
> > Add clk_pll_mmc_ops for enable/disable, prepare, rate control, and
> > status operations on MMC PLL clocks.
> >
> > Also add clk_pll_mmc_phase_ops to support phase get/set operations.
> >
> > Signed-off-by: Cheng-Yu Lee <cylee12@xxxxxxxxxxx>
> > Co-developed-by: Jyan Chou <jyanchou@xxxxxxxxxxx>
> > Signed-off-by: Jyan Chou <jyanchou@xxxxxxxxxxx>
> > Co-developed-by: Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
> > Signed-off-by: Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
> > ---
> > Changes in v10:
> > - None.
> > ---
> >  MAINTAINERS                       |   8 +
> >  drivers/clk/realtek/Kconfig       |   3 +
> >  drivers/clk/realtek/Makefile      |   2 +
> >  drivers/clk/realtek/clk-pll-mmc.c | 430
> ++++++++++++++++++++++++++++++
> >  drivers/clk/realtek/clk-pll.h     |  13 +
> >  5 files changed, 456 insertions(+)
> >  create mode 100644 drivers/clk/realtek/clk-pll-mmc.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS index
> > 1fffb1fc5de1..0c8b98ecc4a5 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -22747,6 +22747,14 @@ F:   drivers/reset/realtek/*
> >  F:   include/dt-bindings/clock/realtek*
> >  F:   include/dt-bindings/reset/realtek*
> >
> > +REALTEK SOC PLL CLOCK FOR MMC SUPPORT
> > +M:   Cheng-Yu Lee <cylee12@xxxxxxxxxxx>
> > +M:   Jyan Chou <jyanchou@xxxxxxxxxxx>
> > +M:   Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
> > +L:   linux-clk@xxxxxxxxxxxxxxx
> > +S:   Supported
> > +F:   drivers/clk/realtek/clk-pll-mmc.c
> 
> 2 of the 3 names listed here are under the new realtek entry added by this
> series. I'm not sure how common this is but it seems overly granular.
> 
> Brian

I have checked with Jyan Chou, and we agree that this entry is too granular.

We will remove the 'REALTEK SOC PLL CLOCK FOR MMC SUPPORT' entry and only keep
the broader one.

Best Regards,
Yu-Chun