Re: [PATCH v6 2/4] clk: sunxi-ng: div: add read-only operation support
From: Chen-Yu Tsai
Date: Wed Jul 22 2026 - 11:59:11 EST
On Wed, Jul 22, 2026 at 10:48 PM Jerome Brunet <jbrunet@xxxxxxxxxxxx> wrote:
>
> Add support for sunxi-ng read-only dividers. This will be
> useful to the a733 oscillator detection logic.
>
> Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxxxx>
> Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> ---
> drivers/clk/sunxi-ng/ccu_div.c | 31 +++++++++++++++++++++++++++++--
> drivers/clk/sunxi-ng/ccu_div.h | 1 +
> drivers/clk/sunxi-ng/ccu_mux.c | 2 +-
> drivers/clk/sunxi-ng/ccu_mux.h | 4 ++++
Left over stuff?
> 4 files changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c
> index 62d680ccb524..c385e0160f13 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.c
> +++ b/drivers/clk/sunxi-ng/ccu_div.c
> @@ -20,8 +20,22 @@ static int ccu_div_determine_rate_helper(struct ccu_mux_internal *mux,
> if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
> req->rate *= cd->fixed_post_div;
>
> - ret = divider_determine_rate(&cd->common.hw, req, cd->div.table,
> - cd->div.width, cd->div.flags);
> + if (cd->div.flags & CLK_DIVIDER_READ_ONLY) {
> + unsigned long val;
> + u32 reg;
> +
> + reg = readl(cd->common.base + cd->common.reg);
> + val = reg >> cd->div.shift;
> + val &= (1 << cd->div.width) - 1;
> +
> + ret = divider_ro_determine_rate(&cd->common.hw, req, cd->div.table,
> + cd->div.width, cd->div.flags, val);
> +
> + } else {
> + ret = divider_determine_rate(&cd->common.hw, req, cd->div.table,
> + cd->div.width, cd->div.flags);
> + }
> +
> if (ret)
> return ret;
>
> @@ -143,3 +157,16 @@ const struct clk_ops ccu_div_ops = {
> .set_rate = ccu_div_set_rate,
> };
> EXPORT_SYMBOL_NS_GPL(ccu_div_ops, "SUNXI_CCU");
> +
> +const struct clk_ops ccu_rodiv_ops = {
> + .disable = ccu_div_disable,
> + .enable = ccu_div_enable,
> + .is_enabled = ccu_div_is_enabled,
> +
> + .get_parent = ccu_div_get_parent,
> + .set_parent = ccu_div_set_parent,
> +
> + .determine_rate = ccu_div_determine_rate,
> + .recalc_rate = ccu_div_recalc_rate,
> +};
> +EXPORT_SYMBOL_NS_GPL(ccu_rodiv_ops, "SUNXI_CCU");
> diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
> index be00b3277e97..a30a92780a05 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.h
> +++ b/drivers/clk/sunxi-ng/ccu_div.h
> @@ -300,5 +300,6 @@ static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw)
> }
>
> extern const struct clk_ops ccu_div_ops;
> +extern const struct clk_ops ccu_rodiv_ops;
>
> #endif /* _CCU_DIV_H_ */
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index 4503c9780c39..12bfc99c9172 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -67,7 +67,7 @@ unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
> return parent_rate / ccu_mux_get_prediv(common, cm, parent_index);
> }
>
> -static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> +unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> int parent_index,
> unsigned long parent_rate)
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
> index c94a4bde5d01..272a2c36a8f2 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.h
> +++ b/drivers/clk/sunxi-ng/ccu_mux.h
> @@ -134,6 +134,10 @@ unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> int parent_index,
> unsigned long parent_rate);
> +unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> + struct ccu_mux_internal *cm,
> + int parent_index,
> + unsigned long parent_rate);
> int ccu_mux_helper_determine_rate(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> struct clk_rate_request *req,
>
> --
> 2.47.3
>