Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support

From: Conor Dooley

Date: Wed Jul 22 2026 - 12:54:25 EST


On Wed, Jul 22, 2026 at 04:18:37PM +0530, Rohan Joshi via B4 Relay wrote:
> From: Rohan Joshi <rohan1sj@xxxxxxxxxxx>
>
> Cadence host controller can optionally support CQE.
> Add optional CQE register space to cdns sdhci bindings.
>
> Signed-off-by: Rohan Joshi <rohan1sj@xxxxxxxxxxx>
> ---
> .../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 +++++++++++++++++++---
> 1 file changed, 25 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index 6c7317d13aa6..10bc9ac2073a 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> @@ -22,7 +22,14 @@ properties:
>
> reg:
> minItems: 1
> - maxItems: 2
> + maxItems: 3
> +
> + reg-names:
> + minItems: 1
> + items:
> + - const: hc
> + - enum: [bctl, cqhci]
> + - const: cqhci
>
> interrupts:
> maxItems: 1
> @@ -131,13 +138,27 @@ allOf:
> then:
> properties:
> reg:
> + minItems: 2
> items:
> - description: Host controller registers
> - description: Elba byte-lane enable register for writes
> + - description: CQE (Command Queuing Engine) registers (optional)

I see no explanation in your commit message for why the elba is being
modified.

This new reg entry should be restricted to only the device-specific
compatibles that actually support it.

pw-bot: changes-requested

Thanks,
Conor.

> + reg-names:
> + minItems: 2
> + items:
> + - const: hc
> + - const: bctl
> + - const: cqhci
> else:
> properties:
> reg:
> - maxItems: 1
> + items:
> + - description: Host Controller registers
> + - description: CQE (Command Queuing Engine) registers (optional)
> + reg-names:
> + items:
> + - const: hc
> + - const: cqhci
>
> unevaluatedProperties: false
>
> @@ -145,7 +166,8 @@ examples:
> - |
> emmc: mmc@5a000000 {
> compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
> - reg = <0x5a000000 0x400>;
> + reg = <0x5a000000 0x400>, <0x5a000400 0x060>;
> + reg-names = "hc", "cqhci";
> interrupts = <0 78 4>;
> clocks = <&clk 4>;
> bus-width = <8>;
>
> --
> 2.43.0
>
>

Attachment: signature.asc
Description: PGP signature