[PATCH v3 3/7] drm: nova: Add chipid enum to nova-drm UAPI

[Alistair Popple]

The chipid contains the GPU architecture and implementation and needs
to be exposed to user-space. This adds a public enum to the userspace
headers for each chip ID. Nova-core can then use this enum to define
it's chipsets.

This does create a coupling between nova-drm and nova-core whereby
nova-core depends on the values defined by the user-space API for
nova-drm. However this is entirely appropriate as nova-core must be
bound by the UAPI headers as the enum values are read by nova-core and
passed through to user-space.

Note that nova-core currently refers to the chipid as a chipset. This
isn't ideal given that chipid is the preferred and more accurate term
and is what should be exposed via the uAPI. Therefore a future patch
series will be posted that aligns nova-core internals to using chipid
rather than chipset.

Signed-off-by: Alistair Popple <apopple@xxxxxxxxxx>

---

Changes since v2:

 - New for v3, split out from "drm: nova: Add GETPARAM parameter to read
   the GPU chipset"
---
 drivers/gpu/nova-core/gpu.rs | 64 +++++++++++++++++++-----------------
 include/uapi/drm/nova_drm.h  | 33 +++++++++++++++++++
 2 files changed, 67 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index 442c0979f9c6..738a590e753b 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -10,7 +10,8 @@
     num::Bounded,
     pci,
     prelude::*,
-    sizes::SizeConstants, //
+    sizes::SizeConstants,
+    uapi, //
 };
 
 use crate::{
@@ -35,12 +36,13 @@
 mod hal;
 
 macro_rules! define_chipset {
-    ({ $($variant:ident = $value:expr),* $(,)* }) =>
+    ({ $($variant:ident),* $(,)* }) =>
     {
+        ::kernel::macros::paste!(
         /// Enum representation of the GPU chipset.
         #[derive(fmt::Debug, Copy, Clone, PartialOrd, Ord, PartialEq, Eq)]
         pub(crate) enum Chipset {
-            $($variant = $value),*,
+            $($variant = uapi::[<drm_nova_chipid_NOVA_DRM_CHIPID_ $variant:upper>] as isize),*,
         }
 
         impl Chipset {
@@ -48,7 +50,6 @@ impl Chipset {
                 $( Chipset::$variant, )*
             ];
 
-            ::kernel::macros::paste!(
             /// Returns the name of this chipset, in lowercase.
             ///
             /// # Examples
@@ -64,7 +65,6 @@ pub(crate) const fn name(&self) -> &'static str {
                 )*
                 }
             }
-            );
         }
 
         // TODO[FPRI]: replace with something like derive(FromPrimitive)
@@ -73,45 +73,49 @@ impl TryFrom<u32> for Chipset {
 
             fn try_from(value: u32) -> Result<Self, Self::Error> {
                 match value {
-                    $( $value => Ok(Chipset::$variant), )*
+                    $(
+                        uapi::[<drm_nova_chipid_NOVA_DRM_CHIPID_ $variant:upper>]
+                            => Ok(Chipset::$variant),
+                    )*
                     _ => Err(ENODEV),
                 }
             }
         }
+    );
     }
 }
 
 define_chipset!({
     // Turing
-    TU102 = 0x162,
-    TU104 = 0x164,
-    TU106 = 0x166,
-    TU117 = 0x167,
-    TU116 = 0x168,
+    TU102,
+    TU104,
+    TU106,
+    TU117,
+    TU116,
     // Ampere
-    GA100 = 0x170,
-    GA102 = 0x172,
-    GA103 = 0x173,
-    GA104 = 0x174,
-    GA106 = 0x176,
-    GA107 = 0x177,
+    GA100,
+    GA102,
+    GA103,
+    GA104,
+    GA106,
+    GA107,
     // Hopper
-    GH100 = 0x180,
+    GH100,
     // Ada
-    AD102 = 0x192,
-    AD103 = 0x193,
-    AD104 = 0x194,
-    AD106 = 0x196,
-    AD107 = 0x197,
+    AD102,
+    AD103,
+    AD104,
+    AD106,
+    AD107,
     // Blackwell GB10x
-    GB100 = 0x1a0,
-    GB102 = 0x1a2,
+    GB100,
+    GB102,
     // Blackwell GB20x
-    GB202 = 0x1b2,
-    GB203 = 0x1b3,
-    GB205 = 0x1b5,
-    GB206 = 0x1b6,
-    GB207 = 0x1b7,
+    GB202,
+    GB203,
+    GB205,
+    GB206,
+    GB207,
 });
 
 impl Chipset {
diff --git a/include/uapi/drm/nova_drm.h b/include/uapi/drm/nova_drm.h
index 3ca90ed9d2bb..cb13fba6b952 100644
--- a/include/uapi/drm/nova_drm.h
+++ b/include/uapi/drm/nova_drm.h
@@ -25,6 +25,39 @@ extern "C" {
  */
 #define NOVA_GETPARAM_VRAM_BAR_SIZE	0x1
 
+enum drm_nova_chipid {
+	/* Turing */
+	NOVA_DRM_CHIPID_TU102 = 0x162,
+	NOVA_DRM_CHIPID_TU104 = 0x164,
+	NOVA_DRM_CHIPID_TU106 = 0x166,
+	NOVA_DRM_CHIPID_TU117 = 0x167,
+	NOVA_DRM_CHIPID_TU116 = 0x168,
+	/* Ampere */
+	NOVA_DRM_CHIPID_GA100 = 0x170,
+	NOVA_DRM_CHIPID_GA102 = 0x172,
+	NOVA_DRM_CHIPID_GA103 = 0x173,
+	NOVA_DRM_CHIPID_GA104 = 0x174,
+	NOVA_DRM_CHIPID_GA106 = 0x176,
+	NOVA_DRM_CHIPID_GA107 = 0x177,
+	/* Hopper */
+	NOVA_DRM_CHIPID_GH100 = 0x180,
+	/* Ada */
+	NOVA_DRM_CHIPID_AD102 = 0x192,
+	NOVA_DRM_CHIPID_AD103 = 0x193,
+	NOVA_DRM_CHIPID_AD104 = 0x194,
+	NOVA_DRM_CHIPID_AD106 = 0x196,
+	NOVA_DRM_CHIPID_AD107 = 0x197,
+	/* Blackwell GB10x */
+	NOVA_DRM_CHIPID_GB100 = 0x1a0,
+	NOVA_DRM_CHIPID_GB102 = 0x1a2,
+	/* Blackwell GB20x */
+	NOVA_DRM_CHIPID_GB202 = 0x1b2,
+	NOVA_DRM_CHIPID_GB203 = 0x1b3,
+	NOVA_DRM_CHIPID_GB205 = 0x1b5,
+	NOVA_DRM_CHIPID_GB206 = 0x1b6,
+	NOVA_DRM_CHIPID_GB207 = 0x1b7,
+};
+
 /**
  * struct drm_nova_getparam - query GPU and driver metadata
  */
-- 
2.54.0